Electrical Engineering and Systems Science > Signal Processing
arXiv:2402.15288 (eess)
[Submitted on 23 Feb 2024]
Title:Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications
View a PDF of the paper titled Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications, by Jonas Ney and 5 other authors
View PDFHTML (experimental)Abstract:In this work, we present a high-throughput field programmable gate array (FPGA) demonstrator of an artificial neural network (ANN)-based equalizer. The equalization is performed and illustrated in real-time for a 30 GBd, two-level pulse amplitude modulation (PAM2) optical communication system.
| Comments: | Accepted and to be presented as demonstrator at the IEEE International Conference on Machine Learning for Communication and Networking (ICMLCN) 2024 |
| Subjects: | Signal Processing (eess.SP); Machine Learning (cs.LG) |
| Cite as: | arXiv:2402.15288 [eess.SP] |
| (orarXiv:2402.15288v1 [eess.SP] for this version) | |
| https://doi.org/10.48550/arXiv.2402.15288 arXiv-issued DOI via DataCite |
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View a PDF of the paper titled Real-Time FPGA Demonstrator of ANN-Based Equalization for Optical Communications, by Jonas Ney and 5 other authors
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