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Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits

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Abstract

In this paper, we present an exhaustive study on the influence of resistive-open defects in pre-charge circuits of SRAM memories. In SRAM memories, the pre-charge circuits operate the pre-charge and equalization at a certain voltage level, in general Vdd, of all the couples of bit lines of the memory array. This action is essential in order to ensure correct read operations. We have analyzed the impact of resistive-opens placed in different locations of these circuits. Each defect studied in this paper disturbs the pre-charge circuit in a different way and for different resistive ranges, but the produced effect on the normal memory action is always the perturbation of the read operations. This faulty behavior can be modeled by Un-Restored Write Faults (URWFs) and Un-Restored Read Faults (URRFs), because there is an incorrect pre-charge/equalization of the bit lines after a write or read operation that disturbs the following read operation. In the last part of the paper, we demonstrate that the test of URWFs is more effective in terms of resistive defect detection than that of URRFs and we list the necessary test conditions to detect them.

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Acknowledgement

This work has been partially funded by the French government under the framework of the MEDEA+ 2A702 “NanoTEST” European program.

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Authors and Affiliations

  1. Laboratoire d’Informatique de Robotique et de Microélectronique de Montpellier, Université de Montpellier II/CNRS, 161, rue Ada, 34392, Montpellier Cedex 5, France

    Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch & Arnaud Virazel

  2. Infineon Technologies France, 2600, Route des Crêtes, 06560, Sophia-Antipolis, France

    Magali Bastian

Authors
  1. Luigi Dilillo

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  2. Patrick Girard

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  3. Serge Pravossoudovitch

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  4. Arnaud Virazel

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  5. Magali Bastian

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Corresponding author

Correspondence toArnaud Virazel.

Additional information

Responsible Editor: C. Landrault

This work has been performed at a time the author was doing his Ph.D. at LIRMM. He is now with the University of Southampton (UK).

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Dilillo, L., Girard, P., Pravossoudovitch, S.et al. Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits.J Electron Test23, 435–444 (2007). https://doi.org/10.1007/s10836-007-5003-9

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