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Abstract
Currently, most of Network on-Chip (NoC) architectures have some limitation in routing decisions. And it makes router nodes overloaded, and sequentially forms deadlock, livelock and congestion. A simple unbuffered router microarchitecture for S-mesh NoC architecture is proposed in this paper. Unbuffered router transforms message without making routing decision. Simulation results showed that S-mesh could get optimal performance in message latency compared with 2D-mesh, Butterfly and Octagon NoC architectures. The Design Compiler synthesis results showed that unbuffered router has obvious advantages on area, and it gets higher operation speed.
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Henan Electric Power Research Institute, Zhengzhou, 450052, China
Hao Liu, Dongsheng Liu & Zhigang Zhang
Henan Electric Power Industrial School, Zhengzhou, 450051, China
Feifei Cao
Department of Electronic Science & Technology,Huazhong, University of Science & Technology, Wuhan, 430074, China
Hao Liu & Xuecheng Zou
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University of Rochester, P.O. Box 270226, 14627, Rochester, NY, USA
Chen Ding
School of Computer Science and Technology, Huazhong University of Science and Technology, 430074, Wuhan, China
Zhiyuan Shao
School of Computer Science and Technology, Services Computing Technology and Huazhong University of Science and Technology, 430074, Wuhan, China
Ran Zheng
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Liu, H., Cao, F., Liu, D., Zou, X., Zhang, Z. (2010). A Methodology for Design of Unbuffered Router Microarchitecture for S-Mesh NoC. In: Ding, C., Shao, Z., Zheng, R. (eds) Network and Parallel Computing. NPC 2010. Lecture Notes in Computer Science, vol 6289. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-15672-4_37
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