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Abstract
Threading in microprocessors is not new, the earliest threaded processor design was implemented in the late 1970s and yet only now is it being used in mainstream microprocessor architecture. This paper reviews threaded microprocessors and explains why the more popular option of out-of-order execution has a poor future and is not likely to provide a pathway for future microprocessor scalability. The first mainstream threaded architectures are beginning to emerge but unfortunately based on out-of-order execution. This paper will review the relevant trends in multi-threaded microprocessor design and look at one approach in detail, showing how wide instruction issue can be achieved and how it can provide excellent performance, latency tolerance and above all scalability with issue width. This model exploits ILP and loop level parallelism using a vector-like instruction set in a chip multiprocessor.
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Authors and Affiliations
Department of Computer Science, University of Hull, HU6 7RX, UK
Chris Jesshope
- Chris Jesshope
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School of Electrical and Electronic Engineering, Yonsei University, Seoul, Korea
Amos Omondi
Graduate School of Computer Science and Engineering, The University of Aizu, 965-8580, Aizu-Wakamatsu City, Fukushima, Japan
Stanislav Sedukhin
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Jesshope, C. (2003). Multi-threaded Microprocessors – Evolution or Revolution. In: Omondi, A., Sedukhin, S. (eds) Advances in Computer Systems Architecture. ACSAC 2003. Lecture Notes in Computer Science, vol 2823. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-39864-6_4
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