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TSIC: Thermal Scheduling Simulator for Chip Multiprocessors

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Part of the book series:Lecture Notes in Computer Science ((LNTCS,volume 3746))

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Abstract

Increased power density, hot-spots, and temperature gradients are severe limiting factors for today’s state-of-the-art microprocessors. However, the flexibility offered by the multiple cores in future Chip Multiprocessors (CMPs) results in a great opportunity for controlling the chip thermal characteristics. When a process is to be assigned to a core, a thermal-aware scheduling policy may be invoked to determine which core is the most appropriate.

In this paper we present TSIC, Thermal SImulator for CMPs, which is a fully parameterizable, user-friendly tool that allows us to easily test different CMP configurations, application characteristics, and scheduling policies. We also present a case study where the use of TSIC together with simple thermal-aware scheduling policies allows us to conclude that there is potential for improving the thermal behavior of a CMP by implementing new process scheduling policies.

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Author information

Authors and Affiliations

  1. Department of Computer Science, University of Cyprus, 75 Kallipoleos Ave., P.O.Box 20537, 1678, Nicosia, Cyprus

    Kyriakos Stavrou & Pedro Trancoso

Authors
  1. Kyriakos Stavrou

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  2. Pedro Trancoso

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Editor information

Editors and Affiliations

  1. Department of Computer and Communication Engineering, University of Thessaly, Glavani 37, 382 21, Volos, Greece

    Panayiotis Bozanis

  2. Department of Computer and Communication Engineering, University of Thessaly, 382 21, Volos, Greece

    Elias N. Houstis

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© 2005 Springer-Verlag Berlin Heidelberg

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Stavrou, K., Trancoso, P. (2005). TSIC: Thermal Scheduling Simulator for Chip Multiprocessors. In: Bozanis, P., Houstis, E.N. (eds) Advances in Informatics. PCI 2005. Lecture Notes in Computer Science, vol 3746. Springer, Berlin, Heidelberg. https://doi.org/10.1007/11573036_56

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