Reverse the order of the elements in the vector.

Rotates the vector such that the firstOFFSET elements of the slice move to the endwhile the lastself.len() - OFFSET elements move to the front. After callingrotate_elements_left,the element previously at indexOFFSET will become the first element in the slice.

leta = Simd::from_array([0,1,2,3]);letx = a.rotate_elements_left::<3>();assert_eq!(x.to_array(), [3,0,1,2]);lety = a.rotate_elements_left::<7>();assert_eq!(y.to_array(), [3,0,1,2]);

Rotates the vector such that the firstself.len() - OFFSET elements of the vector move tothe end while the lastOFFSET elements move to the front. After callingrotate_elements_right,the element previously at indexself.len() - OFFSET will become the first element in the slice.

leta = Simd::from_array([0,1,2,3]);letx = a.rotate_elements_right::<3>();assert_eq!(x.to_array(), [1,2,3,0]);lety = a.rotate_elements_right::<7>();assert_eq!(y.to_array(), [1,2,3,0]);

Shifts the vector elements to the left byOFFSET, filling in withpadding from the right.

leta = Simd::from_array([0,1,2,3]);letx = a.shift_elements_left::<3>(255);assert_eq!(x.to_array(), [3,255,255,255]);lety = a.shift_elements_left::<7>(255);assert_eq!(y.to_array(), [255,255,255,255]);

Shifts the vector elements to the right byOFFSET, filling in withpadding from the left.

leta = Simd::from_array([0,1,2,3]);letx = a.shift_elements_right::<3>(255);assert_eq!(x.to_array(), [255,255,255,0]);lety = a.shift_elements_right::<7>(255);assert_eq!(y.to_array(), [255,255,255,255]);

Interleave two vectors.

The resulting vectors contain elements taken alternatively fromself andother, firstfilling the first result, and then the second.

The reverse of this operation isSimd::deinterleave.

leta = Simd::from_array([0,1,2,3]);letb = Simd::from_array([4,5,6,7]);let(x, y) = a.interleave(b);assert_eq!(x.to_array(), [0,4,1,5]);assert_eq!(y.to_array(), [2,6,3,7]);

Deinterleave two vectors.

The first result takes every other element ofself and thenother, starting withthe first element.

The second result takes every other element ofself and thenother, starting withthe second element.

The reverse of this operation isSimd::interleave.

leta = Simd::from_array([0,4,1,5]);letb = Simd::from_array([2,6,3,7]);let(x, y) = a.deinterleave(b);assert_eq!(x.to_array(), [0,1,2,3]);assert_eq!(y.to_array(), [4,5,6,7]);

Resize a vector.

IfM >N, extends the length of a vector, setting the new elements tovalue.IfM <N, truncates the vector to the firstM elements.

letx = u32x4::from_array([0,1,2,3]);assert_eq!(x.resize::<8>(9).to_array(), [0,1,2,3,9,9,9,9]);assert_eq!(x.resize::<2>(9).to_array(), [0,1]);

Extract a vector from another vector.

letx = u32x4::from_array([0,1,2,3]);assert_eq!(x.extract::<1,2>().to_array(), [1,2]);

Swizzle a vector of bytes according to the index vector.Indices within range select the appropriate byte.Indices “out of bounds” instead select 0.

Note that the current implementation is selected during build-timeof the standard library, socargo build -Zbuild-std may be necessaryto unlock better performance, especially for larger vectors.A planned compiler improvement will enable using#[target_feature] instead.

Number of elements in this vector.

Returns the number of elements in this SIMD vector.

§Examples

letv = u32x4::splat(0);assert_eq!(v.len(),4);

Constructs a new SIMD vector with all elements set to the given value.

§Examples

letv = u32x4::splat(8);assert_eq!(v.as_array(),&[8,8,8,8]);

Returns an array reference containing the entire SIMD vector.

§Examples

letv: u64x4 = Simd::from_array([0,1,2,3]);assert_eq!(v.as_array(),&[0,1,2,3]);

Returns a mutable array reference containing the entire SIMD vector.

Converts an array to a SIMD vector.

Converts a SIMD vector to an array.

Converts a slice to a SIMD vector containingslice[..N].

§Panics

Panics if the slice’s length is less than the vector’sSimd::N.Useload_or_default for an alternative that does not panic.

§Example

letsource =vec![1,2,3,4,5,6];letv = u32x4::from_slice(&source);assert_eq!(v.as_array(),&[1,2,3,4]);

Writes a SIMD vector to the firstN elements of a slice.

§Panics

Panics if the slice’s length is less than the vector’sSimd::N.

§Example

letmutdest =vec![0;6];letv = u32x4::from_array([1,2,3,4]);v.copy_to_slice(&mutdest);assert_eq!(&dest,&[1,2,3,4,0,0]);

Reads contiguous elements fromslice. Elements are read so long as they’re in-bounds fortheslice. Otherwise, the default value for the element type is returned.

§Examples

letvec: Vec<i32> =vec![10,11];letresult = Simd::<i32,4>::load_or_default(&vec);assert_eq!(result, Simd::from_array([10,11,0,0]));

Reads contiguous elements fromslice. Elements are read so long as they’re in-bounds fortheslice. Otherwise, the corresponding value fromor is passed through.

§Examples

letvec: Vec<i32> =vec![10,11];letor = Simd::from_array([-5, -4, -3, -2]);letresult = Simd::load_or(&vec, or);assert_eq!(result, Simd::from_array([10,11, -3, -2]));

Reads contiguous elements fromslice. Each element is read from memory if itscorresponding element inenable istrue.

When the element is disabled or out of bounds for the slice, that memory locationis not accessed and the corresponding value fromor is passed through.

§Examples

letvec: Vec<i32> =vec![10,11,12,13,14,15,16,17,18];letenable = Mask::from_array([true,true,false,true]);letor = Simd::from_array([-5, -4, -3, -2]);letresult = Simd::load_select(&vec, enable, or);assert_eq!(result, Simd::from_array([10,11, -3,13]));

Reads contiguous elements fromslice. Each element is read from memory if itscorresponding element inenable istrue.

When the element is disabled or out of bounds for the slice, that memory locationis not accessed and the corresponding value fromor is passed through.

§Examples

letvec: Vec<i32> =vec![10,11,12,13,14,15,16,17,18];letenable = Mask::from_array([true,true,false,true]);letor = Simd::from_array([-5, -4, -3, -2]);letresult = Simd::load_select(&vec, enable, or);assert_eq!(result, Simd::from_array([10,11, -3,13]));

Reads contiguous elements fromslice. Each element is read from memory if itscorresponding element inenable istrue.

When the element is disabled, that memory location is not accessed and the correspondingvalue fromor is passed through.

§Safety

Enabled loads must not exceed the length ofslice.

Reads contiguous elements starting atptr. Each element is read from memory if itscorresponding element inenable istrue.

When the element is disabled, that memory location is not accessed and the correspondingvalue fromor is passed through.

§Safety

Enabledptr elements must be safe to read as if bystd::ptr::read.

Reads from potentially discontiguous indices inslice to construct a SIMD vector.If an index is out-of-bounds, the element is instead selected from theor vector.

§Examples

letvec: Vec<i32> =vec![10,11,12,13,14,15,16,17,18];letidxs = Simd::from_array([9,3,0,5]);// Note the index that is out-of-boundsletalt = Simd::from_array([-5, -4, -3, -2]);letresult = Simd::gather_or(&vec, idxs, alt);assert_eq!(result, Simd::from_array([-5,13,10,15]));

Reads from indices inslice to construct a SIMD vector.If an index is out-of-bounds, the element is set to the default given byT: Default.

§Examples

letvec: Vec<i32> =vec![10,11,12,13,14,15,16,17,18];letidxs = Simd::from_array([9,3,0,5]);// Note the index that is out-of-boundsletresult = Simd::gather_or_default(&vec, idxs);assert_eq!(result, Simd::from_array([0,13,10,15]));

Reads from indices inslice to construct a SIMD vector.The maskenables alltrue indices and disables allfalse indices.If an index is disabled or is out-of-bounds, the element is selected from theor vector.

§Examples

letvec: Vec<i32> =vec![10,11,12,13,14,15,16,17,18];letidxs = Simd::from_array([9,3,0,5]);// Includes an out-of-bounds indexletalt = Simd::from_array([-5, -4, -3, -2]);letenable = Mask::from_array([true,true,true,false]);// Includes a masked elementletresult = Simd::gather_select(&vec, enable, idxs, alt);assert_eq!(result, Simd::from_array([-5,13,10, -2]));

Reads from indices inslice to construct a SIMD vector.The maskenables alltrue indices and disables allfalse indices.If an index is disabled, the element is selected from theor vector.

§Safety

Calling this function with anenabled out-of-bounds index isundefined behavioreven if the resulting value is not used.

§Examples

letvec: Vec<i32> =vec![10,11,12,13,14,15,16,17,18];letidxs = Simd::from_array([9,3,0,5]);// Includes an out-of-bounds indexletalt = Simd::from_array([-5, -4, -3, -2]);letenable = Mask::from_array([true,true,true,false]);// Includes a masked element// If this mask was used to gather, it would be unsound. Let's fix that.letenable = enable & idxs.simd_lt(Simd::splat(vec.len()));// The out-of-bounds index has been masked, so it's safe to gather now.letresult =unsafe{ Simd::gather_select_unchecked(&vec, enable, idxs, alt) };assert_eq!(result, Simd::from_array([-5,13,10, -2]));

Reads elementwise from pointers into a SIMD vector.

§Safety

Each read must satisfy the same conditions ascore::ptr::read.

§Example

letvalues = [6,2,4,9];letoffsets = Simd::from_array([1,0,0,3]);letsource = Simd::splat(values.as_ptr()).wrapping_add(offsets);letgathered =unsafe{ Simd::gather_ptr(source) };assert_eq!(gathered, Simd::from_array([2,6,6,9]));

Conditionally read elementwise from pointers into a SIMD vector.The maskenables alltrue pointers and disables allfalse pointers.If a pointer is disabled, the element is selected from theor vector,and no read is performed.

§Safety

Enabled elements must satisfy the same conditions ascore::ptr::read.

§Example

letvalues = [6,2,4,9];letenable = Mask::from_array([true,true,false,true]);letoffsets = Simd::from_array([1,0,0,3]);letsource = Simd::splat(values.as_ptr()).wrapping_add(offsets);letgathered =unsafe{ Simd::gather_select_ptr(source, enable, Simd::splat(0)) };assert_eq!(gathered, Simd::from_array([2,6,0,9]));

Conditionally write contiguous elements toslice. Theenable mask controlswhich elements are written, as long as they’re in-bounds of theslice.If the element is disabled or out of bounds, no memory access to that locationis made.

§Examples

letmutarr = [0i32;4];letwrite = Simd::from_array([-5, -4, -3, -2]);letenable = Mask::from_array([false,true,true,true]);write.store_select(&mutarr[..3], enable);assert_eq!(arr, [0, -4, -3,0]);

Conditionally write contiguous elements toslice. Theenable mask controlswhich elements are written.

§Safety

Every enabled element must be in bounds for theslice.

§Examples

letmutarr = [0i32;4];letwrite = Simd::from_array([-5, -4, -3, -2]);letenable = Mask::from_array([false,true,true,true]);unsafe{ write.store_select_unchecked(&mutarr, enable) };assert_eq!(arr, [0, -4, -3, -2]);

Conditionally write contiguous elements starting fromptr.Theenable mask controls which elements are written.When disabled, the memory location corresponding to that element is not accessed.

§Safety

Memory addresses for element are calculatedpointer::wrapping_offset andeach enabled element must satisfy the same conditions ascore::ptr::write.

Writes the values in a SIMD vector to potentially discontiguous indices inslice.If an index is out-of-bounds, the write is suppressed without panicking.If two elements in the scattered vector would write to the same indexonly the last element is guaranteed to actually be written.

§Examples

letmutvec: Vec<i32> =vec![10,11,12,13,14,15,16,17,18];letidxs = Simd::from_array([9,3,0,0]);// Note the duplicate index.letvals = Simd::from_array([-27,82, -41,124]);vals.scatter(&mutvec, idxs);// two logical writes means the last wins.assert_eq!(vec,vec![124,11,12,82,14,15,16,17,18]);

Writes values from a SIMD vector to multiple potentially discontiguous indices inslice.The maskenables alltrue indices and disables allfalse indices.If an enabled index is out-of-bounds, the write is suppressed without panicking.If two enabled elements in the scattered vector would write to the same index,only the last element is guaranteed to actually be written.

§Examples

letmutvec: Vec<i32> =vec![10,11,12,13,14,15,16,17,18];letidxs = Simd::from_array([9,3,0,0]);// Includes an out-of-bounds indexletvals = Simd::from_array([-27,82, -41,124]);letenable = Mask::from_array([true,true,true,false]);// Includes a masked elementvals.scatter_select(&mutvec, enable, idxs);// The last write is masked, thus omitted.assert_eq!(vec,vec![-41,11,12,82,14,15,16,17,18]);

Writes values from a SIMD vector to multiple potentially discontiguous indices inslice.The maskenables alltrue indices and disables allfalse indices.If two enabled elements in the scattered vector would write to the same index,only the last element is guaranteed to actually be written.

§Safety

Calling this function with an enabled out-of-bounds index isundefined behavior,and may lead to memory corruption.

§Examples

letmutvec: Vec<i32> =vec![10,11,12,13,14,15,16,17,18];letidxs = Simd::from_array([9,3,0,0]);letvals = Simd::from_array([-27,82, -41,124]);letenable = Mask::from_array([true,true,true,false]);// Masks the final index// If this mask was used to scatter, it would be unsound. Let's fix that.letenable = enable & idxs.simd_lt(Simd::splat(vec.len()));// We have masked the OOB index, so it's safe to scatter now.unsafe{ vals.scatter_select_unchecked(&mutvec, enable, idxs); }// The second write to index 0 was masked, thus omitted.assert_eq!(vec,vec![-41,11,12,82,14,15,16,17,18]);

Writes pointers elementwise into a SIMD vector.

§Safety

Each write must satisfy the same conditions ascore::ptr::write.

§Example

letmutvalues = [0;4];letoffset = Simd::from_array([3,2,1,0]);letptrs = Simd::splat(values.as_mut_ptr()).wrapping_add(offset);unsafe{ Simd::from_array([6,3,5,7]).scatter_ptr(ptrs); }assert_eq!(values, [7,5,3,6]);

Conditionally write pointers elementwise into a SIMD vector.The maskenables alltrue pointers and disables allfalse pointers.If a pointer is disabled, the write to its pointee is skipped.

§Safety

Enabled pointers must satisfy the same conditions ascore::ptr::write.

§Example

letmutvalues = [0;4];letoffset = Simd::from_array([3,2,1,0]);letptrs = Simd::splat(values.as_mut_ptr()).wrapping_add(offset);letenable = Mask::from_array([true,true,false,false]);unsafe{ Simd::from_array([6,3,5,7]).scatter_select_ptr(ptrs, enable); }assert_eq!(values, [0,0,3,6]);

ASimd<T, N> has a debug format like the one for[T]:

letfloats = Simd::<f32,4>::splat(-1.0);assert_eq!(format!("{:?}", [-1.0;4]),format!("{:?}", floats));