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• Zhonghai Luo

• 2025
• 
  [j94]
  Lanlan Cui,Fei Wu,Xiaojian Liu,Meng Zhang,Zhonghai Lu,Miao Li,Changsheng Xie:
  AsLDPC: Improving Decoding Performance With Absorbing Set Characteristic Aware Low-Density Parity-Check Code.IEEE Trans. Consumer Electron.71(3):7959-7969 (2025)
• 
  [j93]
  Wenyao Zhu,Yizhi Chen,Zhonghai Lu:
  NoCDAS: A Cycle-Accurate NoC-Based Deep Neural Network Accelerator Simulator.ACM Trans. Model. Comput. Simul.35(4):27:1-27:24 (2025)
• 
  [c142]
  Yizhi Chen,Jingwei Li,Wenyao Zhu,Zhonghai Lu:
  Bit Transition Reduction by Data Transmission Ordering in NoC-based DNN Accelerator.SOCC2025:1-6
• 
  [i2]
  Yizhi Chen,Jingwei Li,Wenyao Zhu,Zhonghai Lu:
  Bit Transition Reduction by Data Transmission Ordering in NoC-based DNN Accelerator.CoRRabs/2509.00500 (2025)
• 2024
• 
  [j92]
  Wenqing Song,Sirui Shen,Congwei Xu,Yilin Wang,Xinyu Wang,Yuxiang Fu,Li Li,Zhonghai Lu:
  Heterogeneous Reconfigurable Accelerator for Homomorphic Evaluation on Encrypted Data.IEEE Access12:11850-11864 (2024)
• 
  [j91]
  Wenyao Zhu,Zhenbang Liu,Yizhi Chen,De-Jiu Chen,Zhonghai Lu:
  Amputee Gait Phase Recognition Using Multiple GMM-HMM.IEEE Access12:193796-193806 (2024)
• 
  [j90]
  Yongqi Xue,Jinlun Ji,Xinming Yu,Shize Zhou,Siyue Li,Xinyi Li,Tong Cheng,Shiping Li,Kai Chen,Zhonghai Lu,Li Li,Yuxiang Fu:
  Automatic Generation and Optimization Framework of NoC-Based Neural Network Accelerator Through Reinforcement Learning.IEEE Trans. Computers73(12):2882-2896 (2024)
• 
  [j89]
  Wenjie Fan,Siyue Li,Lingxiao Zhu,Zhonghai Lu,Li Li,Yuxiang Fu:
  Communication Synchronization-Aware Arbitration Policy in NoC-Based DNN Accelerators.IEEE Trans. Circuits Syst. II Express Briefs71(10):4521-4525 (2024)
• 
  [c141]
  Yizhi Chen,Wenyao Zhu,De-Jiu Chen,Omar Mohammed,Parthib Khound,Zhonghai Lu:
  Impact of Image Sensor Input Faults on Pruned Neural Networks for Object Detection.DFT2024:1-6
• 
  [c140]
  Yizhi Chen,Wenyao Zhu,Zhonghai Lu:
  Travel Time-Based Task Mapping for NoC-Based DNN Accelerator.SAMOS2024:76-92
• 
  [c139]
  Wenyao Zhu,Yizhi Chen,Zhonghai Lu:
  Pooling On-the-Go for NoC-Based Convolutional Neural Network Accelerator.SAMOS2024:109-118
• 
  [c138]
  Vahid Geraeinejad,Kun-Chih Jimmy Chen,Zhonghai Lu,Masoumeh Ebrahimi:
  MCLB: Dynamic Load Balancing and Implications on GPU Memory Controllers.SOCC2024:1-6
• 
  [i1]
  Yizhi Chen,Wenyao Zhu,Zhonghai Lu:
  Travel Time Based Task Mapping for NoC-Based DNN Accelerator.CoRRabs/2411.12710 (2024)
• 2023
• 
  [j88]
  Qingshan Liu,Cuiyun Gao,Yang Zhao,Songqun Huang,Yuqing Zhang,Xiaoyu Dong,Zhonghai Lu:
  Health warning based on 3R ECG Sample's combined features and LSTM.Comput. Biol. Medicine162:107082 (2023)
• 
  [j87]
  Zhonghai Lu:
  PiN: Processing in Network-on-Chip.IEEE Des. Test40(6):30-38 (2023)
• 
  [j86]
  Lingxiao Zhu,Wenjie Fan,Chenyang Dai,Shize Zhou,Yongqi Xue,Zhonghai Lu,Li Li,Yuxiang Fu:
  A NoC-Based Spatial DNN Inference Accelerator With Memory-Friendly Dataflow.IEEE Des. Test40(6):39-50 (2023)
• 
  [j85]
  Yu Wang,You Zhou,Fei Wu,Yu Zhong,Jian Zhou,Zhonghai Lu,Shu Li,Zhengyong Wang,Changsheng Xie:
  Holistic and Opportunistic Scheduling of Background I/Os in Flash-Based SSDs.IEEE Trans. Computers72(11):3127-3139 (2023)
• 
  [c137]
  Yu Wang,You Zhou,Zhonghai Lu,Xiaoyi Zhang,Kun Wang,Feng Zhu,Shu Li,Changsheng Xie,Fei Wu:
  FlexZNS: Building High-Performance ZNS SSDs with Size-Flexible and Parity-Protected Zones.ICCD2023:291-299
• 
  [c136]
  Zhonghai Lu,Rui Shi,Chao Guo,Mingrui Liu:
  Age Feature Enhanced Neural Network for RUL Estimation of Power Electronic Devices.ICPHM2023:38-47
• 
  [c135]
  Peng Su,Zhonghai Lu,De-Jiu Chen:
  Combining Self-Organizing Map with Reinforcement Learning for Multivariate Time Series Anomaly Detection.SMC2023:1964-1969
• 2022
• 
  [j84]
  Wenyao Zhu,Yizhi Chen,Siu-Teing Ko,Zhonghai Lu:
  Redundancy Reduction for Sensor Deployment in Prosthetic Socket: A Case Study.Sensors22(9):3103 (2022)
• 
  [j83]
  Boqian Wang,Zhonghai Lu:
  Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture.IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.41(5):1523-1536 (2022)
• 
  [j82]
  Lanlan Cui,Xiaojian Liu,Fei Wu,Zhonghai Lu,Changsheng Xie:
  A Low Bit-Width LDPC Min-Sum Decoding Scheme for NAND Flash.IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.41(6):1971-1975 (2022)
• 
  [j81]
  Hui Chen,Zongguang Yu,Jin Xu,Lin Jiang,Zhonghai Lu,Yuxiang Fu,Li Li:
  Huicore: A Generalized Hardware Accelerator for Complicated Functions.IEEE Trans. Circuits Syst. I Regul. Pap.69(6):2463-2476 (2022)
• 
  [j80]
  Yuan Zhang,Yonggang Zhang,Lele Peng,Lianghua Quan,Shubin Zheng,Zhonghai Lu,Hui Chen:
  Base-2 Softmax Function: Suitability for Training and Efficient Hardware Implementation.IEEE Trans. Circuits Syst. I Regul. Pap.69(9):3605-3618 (2022)
• 
  [c134]
  Qinyu Chen,Congyi Sun,Zhonghai Lu,Chang Gao:
  Enabling Energy-Efficient Inference for Self-Attention Mechanisms in Neural Networks.AICAS2022:25-28
• 
  [c133]
  Zhonghai Lu,Wenyao Zhu,Yizhi Chen,Josephine Charnley,Valter Dejke,Andrii Pomazanskyi,Siu-Teing Ko,Begum Zeybek,Pouyan Mehryar,Zulfiqur Ali,Michalis Karamousadakis,De-Jiu Chen:
  Wearable pressure sensing for lower limb amputees.BioCAS2022:105-109
• 
  [c132]
  Isma-Ilou Sadou,Seyed Morteza Nabavinejad,Zhonghai Lu,Masoumeh Ebrahimi:
  Inference Time Reduction of Deep Neural Networks on Embedded Devices: A Case Study.DSD2022:205-213
• 
  [c131]
  Sirui Shen,Wenqing Song,Xinyu Wang,Xinyu Shao,Yuxiang Fu,Zhonghai Lu,Li Li:
  A Hierarchical Parallel Discrete Gaussian Sampler for Lattice-Based Cryptography.ISCAS2022:1729-1733
• 
  [c130]
  Yizhi Chen,Wenyao Zhu,De-Jiu Chen,Zhonghai Lu:
  Online Image Sensor Fault Detection for Autonomous Vehicles.MCSoC2022:120-127
• 
  [c129]
  Yizhi Chen,Yarib Nevarez,Zhonghai Lu,Alberto García-Ortiz:
  Accelerating Non-Negative Matrix Factorization on Embedded FPGA with Hybrid Logarithmic Dot-Product Approximation.MCSoC2022:239-246
• 2021
• 
  [j79]
  Xiao Hu,Zhonghai Lu:
  A Configurable Hardware Architecture for Runtime Application of Network Calculus.Int. J. Parallel Program.49(5):745-760 (2021)
• 
  [j78]
  Zhonghai Lu:
  Guest Editorial: IEEE TC Special Issue On Communications for Many-core Processors and Accelerators.IEEE Trans. Computers70(6):817-818 (2021)
• 
  [j77]
  Weihua Liu,Fei Wu,Meng Zhang,Chengmo Yang,Zhonghai Lu,Jiguang Wan,Changsheng Xie:
  DEPS: Exploiting a Dynamic Error Prechecking Scheme to Improve the Read Performance of SSD.IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.40(1):66-77 (2021)
• 
  [j76]
  Hui Chen,Heping Yang,Wenqing Song,Zhonghai Lu,Yuxiang Fu,Li Li,Zongguang Yu:
  Symmetric-Mapping LUT-Based Method and Architecture for Computing X^Y-Like Functions.IEEE Trans. Circuits Syst. I Regul. Pap.68(3):1231-1244 (2021)
• 
  [j75]
  Hui Chen,Zongguang Yu,Yonggang Zhang,Zhonghai Lu,Yuxiang Fu,Li Li:
  Low-Complexity High-Precision Method and Architecture for Computing the Logarithm of Complex Numbers.IEEE Trans. Circuits Syst. I Regul. Pap.68(8):3293-3304 (2021)
• 
  [j74]
  Jian Wang,Zhe Chen,Shize Guo,Yubai Li,Zhonghai Lu:
  Optimal Sprinting Pattern in Thermal Constrained CMPs.IEEE Trans. Emerg. Top. Comput.9(1):484-495 (2021)
• 
  [c128]
  Weihua Liu,Fei Wu,Jian Zhou,Meng Zhang,Chengmo Yang,Zhonghai Lu,Yu Wang,Changsheng Xie:
  Modeling of Threshold Voltage Distribution in 3D NAND Flash Memory.DATE2021:1729-1732
• 
  [c127]
  Elaheh Malekzadeh,Nezam Rohbani,Zhonghai Lu,Masoumeh Ebrahimi:
  The Impact of Faults on DNNs: A Case Study.DFT2021:1-6
• 
  [c126]
  Wenyao Zhu,Zhonghai Lu:
  Evaluation of Time Series Clustering on Embedded Sensor Platform.DSD2021:187-191
• 
  [c125]
  Hui Chen,Ruiqi Wu,Zhonghai Lu,Yuxiang Fu,Li Li,Zongguang Yu:
  A General Methodology and Architecture for Arbitrary Complex Number Nth Root Computation.ISCAS2021:1-5
• 
  [c124]
  Qian Gao,Wenqing Song,Zhonghai Lu,Li Li,Yuxiang Fu:
  Dynamic and Traffic-Aware Medium Access Control Mechanisms for Wireless NoC Architectures.ISCAS2021:1-5
• 2020
• 
  [j73]
  Zidi Qin,Yuou Qiu,Muhan Zheng,Hongxi Dong,Zhonghai Lu,Zhongfeng Wang,Hongbing Pan:
  A Universal Approximation Method and Optimized Hardware Architectures for Arithmetic Functions Based on Stochastic Computing.IEEE Access8:46229-46241 (2020)
• 
  [j72]
  Boqian Wang,Zhonghai Lu:
  Efficient Support of AXI4 Transaction Ordering Requirements in Many-Core Architecture.IEEE Access8:182663-182678 (2020)
• 
  [j71]
  Shize Guo,Jian Wang,Zhe Chen,Yubai Li,Zhonghai Lu:
  Securing IoT Space via Hardware Trojan Detection.IEEE Internet Things J.7(11):11115-11122 (2020)
• 
  [j70]
  Yuan Yao,Zhonghai Lu:
  Pursuing Extreme Power Efficiency With PPCC Guided NoC DVFS.IEEE Trans. Computers69(3):410-426 (2020)
• 
  [j69]
  Boqian Wang,Zhonghai Lu:
  Advance Virtual Channel Reservation.IEEE Trans. Computers69(9):1320-1334 (2020)
• 
  [j68]
  Ruixiang Ma,Fei Wu,Zhonghai Lu,Wenmin Zhong,Qiulin Wu,Jiguang Wan,Changsheng Xie:
  BlockHammer: Improving Flash Reliability by Exploiting Process Variation Aware Proactive Failure Prediction.IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.39(12):4563-4574 (2020)
• 
  [j67]
  Hui Chen,Kaifeng Cheng,Zhonghai Lu,Yuxiang Fu,Li Li:
  Hyperbolic CORDIC-Based Architecture for Computing Logarithm and Its Implementation.IEEE Trans. Circuits Syst.67-II(11):2652-2656 (2020)
• 
  [j66]
  Zidi Qin,Yuou Qiu,Huaqing Sun,Zhonghai Lu,Zhongfeng Wang,Qinghong Shen,Hongbing Pan:
  A Novel Approximation Methodology and Its Efficient VLSI Implementation for the Sigmoid Function.IEEE Trans. Circuits Syst.67-II(12):3422-3426 (2020)
• 
  [j65]
  Qinyu Chen,Yan Huang,Rui Sun,Wenqing Song,Zhonghai Lu,Yuxiang Fu,Li Li:
  An Efficient Accelerator for Multiple Convolutions From the Sparsity Perspective.IEEE Trans. Very Large Scale Integr. Syst.28(6):1540-1544 (2020)
• 
  [c123]
  Hui Chen,Lin Jiang,Yuanyong Luo,Zhonghai Lu,Yuxiang Fu,Li Li,Zongguang Yu:
  A CORDIC-Based Architecture with Adjustable Precision and Flexible Scalability to Implement Sigmoid and Tanh Functions.ISCAS2020:1-5
• 
  [c122]
  Boqian Wang,Zhonghai Lu:
  Supporting QoS in AXI4 Based Communication Architecture.ISVLSI2020:548-553
• 
  [c121]
  Xiao Hu,Zhonghai Lu:
  A Configurable Hardware Architecture for Runtime Application of Network Calculus.NPC2020:203-216

• 2019
• 
  [j64]
  Ruixiang Ma,Fei Wu,Meng Zhang,Zhonghai Lu,Jiguang Wan,Changsheng Xie:
  RBER-Aware Lifetime Prediction Scheme for 3D-TLC NAND Flash Memory.IEEE Access7:44696-44708 (2019)
• 
  [j63]
  Zhe Chen,Shize Guo,Jian Wang,Yubai Li,Zhonghai Lu:
  Toward FPGA Security in IoT: A New Detection Technique for Hardware Trojans.IEEE Internet Things J.6(4):7061-7068 (2019)
• 
  [j62]
  Gaoming Du,Guanyu Liu,Zhenmin Li,Yifan Cao,Duoli Zhang,Yiming Ouyang,Minglun Gao,Zhonghai Lu:
  SSS: Self-aware System-on-chip Using a Static-dynamic Hybrid Method.ACM J. Emerg. Technol. Comput. Syst.15(3):28:1-28:26 (2019)
• 
  [j61]
  You Zhou,Fei Wu,Zhonghai Lu,Xubin He,Ping Huang,Changsheng Xie:
  SCORE: A Novel Scheme to Efficiently Cache Overlong ECCs in NAND Flash Memory.ACM Trans. Archit. Code Optim.15(4):60:1-60:25 (2019)
• 
  [j60]
  Wenhui Zhang,Qiang Cao,Zhonghai Lu:
  Bit-Flipping Schemes Upon MLC Flash: Investigation, Implementation, and Evaluation.IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.38(4):780-784 (2019)
• 
  [j59]
  Shize Guo,Jian Wang,Zhe Chen,Zhonghai Lu,Jinhong Guo,Lian Yang:
  Security-Aware Task Mapping Reducing Thermal Side Channel Leakage in CMPs.IEEE Trans. Ind. Informatics15(10):5435-5443 (2019)
• 
  [c120]
  Martin Törngren,Fredrik Asplund,Tor Ericson,Catrin Granbom,Erik Herzog,Zhonghai Lu,Mats Magnusson,Maria Månsson,Stefan Norrwing,Johanna Olsson,Johnny Öberg:
  Competence Networks in the Era of CPS - Lessons Learnt in the ICES Cross-Disciplinary and Multi-domain Center.CyPhy/WESE2019:264-283
• 
  [c119]
  Boqian Wang,Zhonghai Lu,Shenggang Chen:
  ANN Based Admission Control for On-Chip Networks.DAC2019:46
• 
  [c118]
  Weihua Liu,Fei Wu,Meng Zhang,Yifei Wang,Zhonghai Lu,Xiangfeng Lu,Changsheng Xie:
  Characterizing the Reliability and Threshold Voltage Shifting of 3D Charge Trap NAND Flash.DATE2019:312-315
• 
  [c117]
  Boqian Wang,Zhonghai Lu:
  Advance Virtual Channel Reservation.DATE2019:1178-1183
• 
  [c116]
  Shenggang Chen,Zhonghai Lu:
  Hardware Acceleration of Multilayer Perceptron Based on Inter-Layer Optimization.ICCD2019:164-172
• 
  [c115]
  Gaoming Du,Zhenwen Yang,Zhenmin Li,Duoli Zhang,Yongsheng Yin,Zhonghai Lu:
  NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator.ICCD2019:173-176
• 
  [c114]
  Matthias Becker,Zhonghai Lu,De-Jiu Chen:
  An Adaptive Resource Provisioning Scheme for Industrial SDN Networks.INDIN2019:877-880
• 
  [c113]
  Qinyu Chen,Yuxiang Fu,Kaifeng Cheng,Wenqing Song,Zhonghai Lu,Li Li,Chuan Zhang:
  Smilodon: An Efficient Accelerator for Low Bit-Width CNNs with Task Partitioning.ISCAS2019:1-5
• 
  [c112]
  Yuxiang Fu,Qinyu Chen,Guoqiang He,Kai Chen,Zhonghai Lu,Chuan Zhang,Li Li:
  Congestion-Aware Dynamic Elevator Assignment for Partially Connected 3D-NoCs.ISCAS2019:1-5
• 2018
• 
  [j58]
  Zicong Wang,Xiaowen Chen,Zhonghai Lu,Yang Guo:
  Cache Access Fairness in 3D Mesh-Based NUCA.IEEE Access6:42984-42996 (2018)
• 
  [j57]
  Zhonghai Lu,Yuan Yao:
  Thread Voting DVFS for Manycore NoCs.IEEE Trans. Computers67(10):1506-1524 (2018)
• 
  [j56]
  Zhonghai Lu,Xueqian Zhao:
  xMAS-Based QoS Analysis Methodology.IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.37(2):364-377 (2018)
• 
  [j55]
  Yanchen Long,Zhonghai Lu,Haibin Shen:
  Composable Worst-Case Delay Bound Analysis Using Network Calculus.IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.37(3):705-709 (2018)
• 
  [j54]
  Shunzhuo Wang,Fei Wu,Zhonghai Lu,Jiaona Zhou,Changsheng Xie:
  WARD: Wear Aware RAID Design Within SSDs.IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.37(11):2918-2928 (2018)
• 
  [j53]
  Jian Wang,Shize Guo,Zhe Chen,Yubai Li,Zhonghai Lu:
  A New Parallel CODEC Technique for CDMA NoCs.IEEE Trans. Ind. Electron.65(8):6527-6537 (2018)
• 
  [j52]
  Qin Xiong,Fei Wu,Zhonghai Lu,Yue Zhu,You Zhou,Yibing Chu,Changsheng Xie,Ping Huang:
  Characterizing 3D Floating Gate NAND Flash: Observations, Analyses, and Implications.ACM Trans. Storage14(2):16:1-16:31 (2018)
• 
  [j51]
  Cunlu Li,Dezun Dong,Zhonghai Lu,Xiangke Liao:
  RoB-Router : A Reorder Buffer Enabled Low Latency Network-on-Chip Router.IEEE Trans. Parallel Distributed Syst.29(9):2090-2104 (2018)
• 
  [j50]
  Xiaowen Chen,Yuanwu Lei,Zhonghai Lu,Shuming Chen:
  A Variable-Size FFT Hardware Accelerator Based on Matrix Transposition.IEEE Trans. Very Large Scale Integr. Syst.26(10):1953-1966 (2018)
• 
  [c111]
  Xin Shi,Fei Wu,Shunzhuo Wang,Changsheng Xie,Zhonghai Lu:
  Program error rate-based wear leveling for NAND flash memory.DATE2018:1241-1246
• 
  [c110]
  Yuan Yao,Zhonghai Lu:
  iNPG: Accelerating Critical Section Access with In-network Packet Generation for NoC Based Many-Cores.HPCA2018:15-26
• 
  [c109]
  Fei Wu,Yue Zhu,Qin Xiong,Zhonghai Lu,You Zhou,Weizhen Kong,Changsheng Xie:
  Characterizing 3D Charge Trap NAND Flash: Observations, Analyses and Applications.ICCD2018:381-388
• 
  [c108]
  Matthias Becker,Zhonghai Lu,De-Jiu Chen:
  Towards QoS-Aware Service-Oriented Communication in E/E Automotive Architectures.IECON2018:4096-4101
• 
  [c107]
  Hao Lv,You Zhou,Fei Wu,Weijun Xiao,Xubin He,Zhonghai Lu,Changsheng Xie:
  Exploiting Minipage-Level Mapping to Improve Write Efficiency of NAND Flash.NAS2018:1-10
• 
  [e4]
  Zhonghai Lu,Sriram R. Vangal,Jiang Xu,Paul Bogdan:
  Twelfth IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2018, Torino, Italy, October 4-5, 2018.IEEE2018, ISBN978-1-5386-4893-3[contents]
• 2017
• 
  [j49]
  Mohammad Badawi,Zhonghai Lu,Ahmed Hemani:
  Quality-of-service-aware adaptation scheme for multi-core protocol processing architecture.Microprocess. Microsystems54:47-59 (2017)
• 
  [j48]
  Qin Xiong,Fei Wu,Zhonghai Lu,Changsheng Xie:
  Extending Real-Time Analysis for Wormhole NoCs.IEEE Trans. Computers66(9):1532-1546 (2017)
• 
  [j47]
  Zhonghai Lu,Yuan Yao:
  Marginal Performance: Formalizing and Quantifying Power Over/Under Provisioning in NoC DVFS.IEEE Trans. Computers66(11):1903-1917 (2017)
• 
  [j46]
  Xiaowen Chen,Zhonghai Lu,Sheng Liu,Shuming Chen:
  Round-trip DRAM Access Fairness in 3D NoC-based Many-core Systems.ACM Trans. Embed. Comput. Syst.16(5s):162:1-162:21 (2017)
• 
  [j45]
  Xueqian Zhao,Zhonghai Lu:
  A Tool for xMAS-Based Modeling and Analysis of Communication Fabrics in Simulink.ACM Trans. Model. Comput. Simul.27(3):16 (2017)
• 
  [j44]
  Zhonghai Lu,Yuan Yao:
  Dynamic Traffic Regulation in NoC-Based Systems.IEEE Trans. Very Large Scale Integr. Syst.25(2):556-569 (2017)
• 
  [c106]
  Gaoming Du,Shibi Ma,Zhenmin Li,Zhonghai Lu,Yiming Ouyang,Minglun Gao:
  SSS: self-aware system-on-chip using static-dynamic hybrid method (work-in-progress).CASES2017:8:1-8:2
• 
  [c105]
  Yuan Yao,Zhonghai Lu:
  Prediction based convolution neural network acceleration: work-in-progress.CASES2017:10:1-10:2
• 
  [c104]
  Shunzhuo Wang,Fei Wu,Zhonghai Lu,You Zhou,Qin Xiong,Meng Zhang,Changsheng Xie:
  Lifetime adaptive ECC in NAND flash page management.DATE2017:1253-1556
• 
  [c103]
  De-Jiu Chen,Zhonghai Lu:
  A Methodological Framework for Model-Based Self-management of Services and Components in Dependable Cyber-Physical Systems.DepCoS-RELCOMEX2017:97-105
• 
  [c102]
  De-Jiu Chen,Zhonghai Lu:
  A Model-Based Approach to Dynamic Self-assessment for Automated Performance and Safety Awareness of Cyber-Physical Systems.IMBSA2017:227-240
• 
  [c101]
  Yue Zhu,Fei Wu,Qin Xiong,Zhonghai Lu,Changsheng Xie:
  ALARM: A Location-Aware Redistribution Method to Improve 3D FG NAND Flash Reliability.NAS2017:1-10
• 
  [c100]
  Qin Xiong,Fei Wu,Zhonghai Lu,Yue Zhu,You Zhou,Yibing Chu,Changsheng Xie,Ping Huang:
  Characterizing 3D Floating Gate NAND Flash.SIGMETRICS (Abstracts)2017:31-32
• 
  [e3]
  Mats Brorsson,Zhonghai Lu,Giovanni Agosta,Alessandro Barenghi,Gerardo Pelosi:
  Proceedings of the Fourth Workshop on Cryptography and Security in Computing Systems, CS2@HiPEAC 2017, Stockholm, Sweden, January 24, 2017.ACM2017, ISBN978-1-4503-4869-0[contents]
• 
  [e2]
  Axel Jantsch,Hiroki Matsutani,Zhonghai Lu,Ümit Y. Ogras:
  Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, NOCS 2017, Seoul, Republic of Korea, October 19 - 20, 2017.ACM2017, ISBN978-1-4503-4984-0[contents]
• 2016
• 
  [j43]
  Ning Ma,Zhuo Zou,Zhonghai Lu,Li-Rong Zheng:
  Design and implementation of multi-mode routers for large-scale inter-core networks.Integr.53:1-13 (2016)
• 
  [j42]
  Zhonghai Lu,Yuan Yao:
  Aggregate Flow-Based Performance Fairness in CMPs.ACM Trans. Archit. Code Optim.13(4):53:1-53:27 (2016)
• 
  [j41]
  Yuxiang Huan,Ning Ma,Jia Mao,Stefan Blixt,Zhonghai Lu,Zhuo Zou,Li-Rong Zheng:
  A 101.4 GOPS/W Reconfigurable and Scalable Control-Centric Embedded Processor for Domain-Specific Applications.IEEE Trans. Circuits Syst. I Regul. Pap.63-I(12):2245-2256 (2016)
• 
  [j40]
  Jian Wang,Zhonghai Lu,Yubai Li:
  A New CDMA Encoding/Decoding Method for on-Chip Communication Network.IEEE Trans. Very Large Scale Integr. Syst.24(4):1607-1611 (2016)
• 
  [j39]
  Fahimeh Jafari,Axel Jantsch,Zhonghai Lu:
  Weighted Round Robin Configuration for Worst-Case Delay Optimization in Network-on-Chip.IEEE Trans. Very Large Scale Integr. Syst.24(12):3387-3400 (2016)
• 
  [c99]
  Gaoming Du,Yanghao Ou,Xiangyang Li,Ping Song,Zhonghai Lu,Minglun Gao:
  OLITS: An Ohm's Law-like traffic splitting model based on congestion prediction.DATE2016:1000-1005
• 
  [c98]
  Yuan Yao,Zhonghai Lu:
  Memory-access aware DVFS for network-on-chip in CMPs.DATE2016:1433-1436
• 
  [c97]
  Mohammad Badawi,Zhonghai Lu,Ahmed Hemani:
  Elastic Management and QoS Provisioning Scheme for Adaptable Multi-core Protocol Processing Architecture.DSD2016:575-583
• 
  [c96]
  Qin Xiong,Zhonghai Lu,Fei Wu,Changsheng Xie:
  Real-Time Analysis for Wormhole NoC: Revisited and Revised.ACM Great Lakes Symposium on VLSI2016:75-80
• 
  [c95]
  Yuan Yao,Zhonghai Lu:
  DVFS for NoCs in CMPs: A thread voting approach.HPCA2016:309-320
• 
  [c94]
  Yuan Yao,Zhonghai Lu:
  Opportunistic Competition Overhead Reduction for Expediting Critical Section in NoC Based CMPs.ISCA2016:279-290
• 
  [c93]
  Ning Ma,Zhuo Zou,Zhonghai Lu,Li-Rong Zheng,Yuxiang Huan,Stefan Blixt:
  A 101.4 GOPS/W reconfigurable and scalable control-centric embedded processor for domain-specific applications.ISCAS2016:1746-1749
• 
  [c92]
  Xiaowen Chen,Zhonghai Lu,Yuanwu Lei,Yaohua Wang,Shenggang Chen:
  Multi-bit transient fault control for NoC links using 2D fault coding method.NOCS2016:1-8
• 
  [c91]
  Mohammad Badawi,Zhonghai Lu,Ahmed Hemani:
  Service-Guaranteed Multi-port Packet Memory for Parallel Protocol Processing Architecture.PDP2016:408-412
• 2015
• 
  [j38]
  Xiaowen Chen,Zhonghai Lu,Axel Jantsch,Shuming Chen,Yang Guo,Shenggang Chen,Hu Chen:
  Performance Analysis of Homogeneous On-Chip Large-Scale Parallel Computing Architectures for Data-Parallel Applications.J. Electr. Comput. Eng.2015:902591:1-902591:20 (2015)
• 
  [j37]
  Shaoteng Liu,Axel Jantsch,Zhonghai Lu:
  MultiCS: Circuit switched NoC with multiple sub-networks and sub-channels.J. Syst. Archit.61(9):423-434 (2015)
• 
  [j36]
  Xiaowen Chen,Zhonghai Lu,Axel Jantsch,Shuming Chen,Yang Guo,Shenggang Chen,Hu Chen,Man Liao:
  Command-Triggered Microcode Execution for Distributed Shared Memory Based Multi-Core Network-on-Chips.J. Softw.10(2):142-161 (2015)
• 
  [j35]
  Xueqian Zhao,Zhonghai Lu:
  Heuristics-Aided Tightness Evaluation of Analytical Bounds in Networks-on-Chip.IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.34(6):986-999 (2015)
• 
  [j34]
  Fahimeh Jafari,Zhonghai Lu,Axel Jantsch:
  Least Upper Delay Bound for VBR Flows in Networks-on-Chip with Virtual Channels.ACM Trans. Design Autom. Electr. Syst.20(3):35:1-35:33 (2015)
• 
  [c90]
  Chaochao Feng,Zhuofan Liao,Zhonghai Lu,Axel Jantsch,Zhenyu Zhao:
  Performance analysis of on-chip bufferless router with multi-ejection ports.ASICON2015:1-4
• 
  [c89]
  Yuang Zhang,Li Li,Axel Jantsch,Zhonghai Lu,Minglun Gao,Yuxiang Fu,Hongbing Pan:
  Exploring stacked main memory architecture for 3D GPGPUs.ASICON2015:1-4
• 
  [c88]
  Xiaowen Chen,Zhonghai Lu,Yang Li,Axel Jantsch,Xueqian Zhao,Shuming Chen,Yang Guo,Zonglin Liu,Jianzhuang Lu,Jianghua Wan,Shuwei Sun,Shenggang Chen,Hu Chen:
  Achieving Memory Access Equalization Via Round-Trip Routing Latency Prediction in 3D Many-Core NoCs.ISVLSI2015:398-403
• 
  [c87]
  Alberto Saggio,Gaoming Du,Xueqian Zhao,Zhonghai Lu:
  Validating Delay Bounds in Networks on Chip: Tightness and Pitfalls.ISVLSI2015:404-409
• 
  [c86]
  Xueqian Zhao,Zhonghai Lu:
  Backlog Bound Analysis for Virtual-Channel Routers.ISVLSI2015:422-427
• 
  [c85]
  Shaoteng Liu,Zhonghai Lu,Axel Jantsch:
  Highway in TDM NoCs.NOCS2015:15:1-15:8
• 
  [c84]
  Ning Ma,Zhuo Zou,Zhonghai Lu,Li-Rong Zheng:
  Implementing MVC Decoding on Homogeneous NoCs: Circuit Switching or Wormhole Switching.PDP2015:387-391
• 2014
• 
  [j33]
  Xiaowen Chen,Zhonghai Lu,Axel Jantsch,Shuming Chen,Yang Guo,Hengzhu Liu:
  Cooperative communication for efficient and scalable all-to-all barrier synchronization on mesh-based many-core NoCs.IEICE Electron. Express11(18):20140542 (2014)
• 
  [j32]
  Yuang Zhang,Li Li,Zhonghai Lu,Axel Jantsch,Minglun Gao,Hongbing Pan,Feng Han:
  A survey of memory architecture for 3D chip multi-processors.Microprocess. Microsystems38(5):415-430 (2014)
• 
  [j31]
  Zhi Zhang,Zhonghai Lu,Vardan Saakian,Xing Qin,Qiang Chen,Li-Rong Zheng:
  Item-Level Indoor Localization With Passive UHF RFID Based on Tag Interaction Analysis.IEEE Trans. Ind. Electron.61(4):2122-2135 (2014)
• 
  [j30]
  Shaoteng Liu,Axel Jantsch,Zhonghai Lu:
  A Fair and Maximal Allocator for Single-Cycle On-Chip Homogeneous Resource Allocation.IEEE Trans. Very Large Scale Integr. Syst.22(10):2229-2233 (2014)
• 
  [c83]
  Mohammad Badawi,Ahmed Hemani,Zhonghai Lu:
  Customizable coarse-grained energy-efficient reconfigurable packet processing architecture.ASAP2014:30-35
• 
  [c82]
  Yuan Yao,Zhonghai Lu:
  Fuzzy flow regulation for Network-on-Chip based chip multiprocessors systems.ASP-DAC2014:343-348
• 
  [c81]
  Shaoteng Liu,Axel Jantsch,Zhonghai Lu:
  Parallel probe based dynamic connection setup in TDM NoCs.DATE2014:1-6
• 
  [c80]
  Yanchen Long,Zhonghai Lu,Xiaolang Yan:
  Analysis and evaluation of per-flow delay bound for multiplexing models.DATE2014:1-4
• 
  [c79]
  Xueqian Zhao,Zhonghai Lu:
  Empowering study of delay bound tightness with simulated annealing.DATE2014:1-6
• 
  [c78]
  Yuang Zhang,Li Li,Zhonghai Lu,Axel Jantsch,Yuxiang Fu,Minglun Gao:
  Performance and network power evaluation of tightly mixed SRAM NUCA for 3D Multi-core Network on Chips.ISCAS2014:1961-1964
• 
  [c77]
  Gaoming Du,Miao Li,Zhonghai Lu,Minglun Gao,Chunhua Wang:
  An analytical model for worst-case reorder buffer size of multi-path minimal routing NoCs.NOCS2014:49-56
• 
  [c76]
  Zhonghai Lu,Yuan Yao,Yuming Jiang:
  Towards stochastic delay bound analysis for Network-on-Chip.NOCS2014:64-71
• 
  [c75]
  Ning Ma,Zhuo Zou,Zhonghai Lu,Li-Rong Zheng,Stefan Blixt:
  A hierarchical reconfigurable micro-coded multi-core processor for IoT applications.ReCoSoC2014:1-4
• 2013
• 
  [j29]
  Xiaowen Chen,Zhonghai Lu,Axel Jantsch,Shuming Chen,Shenggang Chen,Huitao Gu:
  Reducing Virtual-to-Physical address translation overhead in Distributed Shared Memory based multi-core Network-on-Chips according to data property.Comput. Electr. Eng.39(2):596-612 (2013)
• 
  [j28]
  Abbas Eslami Kiasari,Axel Jantsch,Zhonghai Lu:
  Mathematical formalisms for performance evaluation of networks-on-chip.ACM Comput. Surv.45(3):38:1-38:41 (2013)
• 
  [j27]
  Zhi Zhang,Zhonghai Lu,Qiang Chen,Xiaolang Yan,Li-Rong Zheng:
  Code division multiple access/pulse position modulation ultra-wideband radio frequency identification for Internet of Things: concept and analysis.Int. J. Commun. Syst.26(11):1502 (2013)
• 
  [j26]
  Abdul Naeem,Axel Jantsch,Zhonghai Lu:
  Scalability Analysis of Memory Consistency Models in NoC-Based Distributed Shared Memory SoCs.IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.32(5):760-773 (2013)
• 
  [j25]
  Abbas Eslami Kiasari,Zhonghai Lu,Axel Jantsch:
  An Analytical Latency Model for Networks-on-Chip.IEEE Trans. Very Large Scale Integr. Syst.21(1):113-123 (2013)
• 
  [j24]
  Chaochao Feng,Zhonghai Lu,Axel Jantsch,Minxuan Zhang,Zuocheng Xing:
  Addressing Transient and Permanent Faults in NoC With Efficient Fault-Tolerant Deflection Router.IEEE Trans. Very Large Scale Integr. Syst.21(6):1053-1066 (2013)
• 
  [c74]
  Shaoteng Liu,Axel Jantsch,Zhonghai Lu:
  Analysis and Evaluation of Circuit Switched NoC and Packet Switched NoC.DSD2013:21-28
• 
  [c73]
  Jiajie Zhang,Zheng Yu,Zhiyi Yu,Kexin Zhang,Zhonghai Lu,Axel Jantsch:
  Efficient distributed memory management in a multi-core H.264 decoder on FPGA.ISSoC2013:1-4
• 
  [c72]
  Xueqian Zhao,Zhonghai Lu:
  Per-flow delay bound analysis based on a formalized microarchitectural model.NOCS2013:1-8
• 2012
• 
  [j23]
  Yancang Chen,Zhonghai Lu,Lunguo Xie,Jinwen Li,Minxuan Zhang:
  A single-cycle output buffered router with layered switching for Networks-on-Chips.Comput. Electr. Eng.38(4):906-916 (2012)
• 
  [j22]
  Wenmin Hu,Hengzhu Liu,Zhonghai Lu,Axel Jantsch,Guitao Fu:
  Self-selection pseudo- circuit: a clever crossbar pre-allocation.IEICE Electron. Express9(6):558-564 (2012)
• 
  [j21]
  Zhi Zhang,Zhonghai Lu,Qiang Chen,Xiaolang Yan:
  Design and Optimization of a CDMA-Based Multi-Reader Passive UHF RFID System for Dense Scenarios.IEICE Trans. Commun.95-B(1):206-216 (2012)
• 
  [j20]
  Chaochao Feng,Zhonghai Lu,Axel Jantsch,Minxuan Zhang,Xianju Yang:
  Support Efficient and Fault-Tolerant Multicast in Bufferless Network-on-Chip.IEICE Trans. Inf. Syst.95-D(4):1052-1061 (2012)
• 
  [j19]
  Chaochao Feng,Zhonghai Lu,Axel Jantsch,Minxuan Zhang:
  A 1-Cycle 1.25 GHz Bufferless Router for 3D Network-on-Chip.IEICE Trans. Inf. Syst.95-D(5):1519-1522 (2012)
• 
  [j18]
  Zhi Zhang,Zhonghai Lu,Qiang Chen,Xiaolang Yan,Li-Rong Zheng:
  Code division multiple access/pulse position modulation ultra-wideband radio frequency identification for Internet of Things: concept and analysis.Int. J. Commun. Syst.25(9):1103-1121 (2012)
• 
  [j17]
  Huimin She,Zhonghai Lu,Axel Jantsch,Dian Zhou,Li-Rong Zheng:
  Performance Analysis of Flow-Based Traffic Splitting Strategy on Cluster-Mesh Sensor Networks.Int. J. Distributed Sens. Networks8 (2012)
• 
  [j16]
  Ming Liu,Zhonghai Lu,Wolfgang Kuehn,Axel Jantsch:
  A Survey of FPGA Dynamic Reconfiguration Design Methodology and Applications.Int. J. Embed. Real Time Commun. Syst.3(2):23-39 (2012)
• 
  [j15]
  Wenmin Hu,Zhonghai Lu,Hengzhu Liu,Axel Jantsch:
  TPSS: A Flexible Hardware Support for Unicast and Multicast on Network-on-Chip.J. Comput.7(7):1743-1752 (2012)
• 
  [j14]
  Meikang Qiu,Zhong Ming,Jiayin Li,Shaobo Liu,Bin Wang,Zhonghai Lu:
  Three-phase time-aware energy minimization with DVFS and unrolling for Chip Multiprocessors.J. Syst. Archit.58(10):439-445 (2012)
• 
  [c71]
  Abbas Eslami Kiasari,Axel Jantsch,Marco Bekooij,Alan Burns,Zhonghai Lu:
  Analytical approaches for performance evaluation of networks-on-chip.CASES2012:211-212
• 
  [c70]
  Gaoming Du,Cunqiang Zhang,Zhonghai Lu,Alberto Saggio,Minglun Gao:
  Worst-case performance analysis of 2-D mesh NoCs using multi-path minimal routing.CODES+ISSS2012:123-132
• 
  [c69]
  Fahimeh Jafari,Axel Jantsch,Zhonghai Lu:
  Worst-case delay analysis of Variable Bit-Rate flows in network-on-chip with aggregate scheduling.DATE2012:538-541
• 
  [c68]
  Shaoteng Liu,Axel Jantsch,Zhonghai Lu:
  Parallel probing: Dynamic and constant time setup procedure in circuit switching NoC.DATE2012:1289-1294
• 
  [c67]
  Abdul Naeem,Axel Jantsch,Zhonghai Lu:
  Architecture Support and Comparison of Three Memory Consistency Models in NoC Based Systems.DSD2012:304-311
• 
  [c66]
  Abdul Naeem,Axel Jantsch,Zhonghai Lu:
  Scalability analysis of release and sequential consistency models in NoC based multicore systems.ISSoC2012:1-7
• 
  [c65]
  Huimin She,Zhonghai Lu,Axel Jantsch:
  System-level evaluation of sensor networks deployment strategies: Coverage, lifetime and cost.IWCMC2012:549-554
• 
  [c64]
  Pierre Schamberger,Zhonghai Lu,Xianyang Jiang,Meikang Qiu:
  Modeling and Power Evaluation of On-Chip Router Components in Spintronics.NOCS2012:51-58
• 
  [c63]
  Zhonghai Lu,Yi Wang:
  Dynamic Flow Regulation for IP Integration on Network-on-Chip.NOCS2012:115-123
• 
  [c62]
  Xianyang Jiang,Deshi Li,Shaobo Nie,Jing Luo,Zhonghai Lu:
  An Enhanced IOT Gateway in a Broadcast System.UIC/ATC2012:746-751
• 2011
• 
  [j13]
  Ming Liu,Wolfgang Kuehn,S. Lange,Shuo Yang,J. Roskoss,Zhonghai Lu,Axel Jantsch,Qiang Wang,Hao Xu,Dapeng Jin:
  A High-End Reconfigurable Computation Platform for Nuclear and Particle Physics Experiments.Comput. Sci. Eng.13(2):52-63 (2011)
• 
  [j12]
  Ming Liu,Zhonghai Lu,Wolfgang Kuehn,Axel Jantsch:
  FPGA-Based Particle Recognition in the HADES Experiment.IEEE Des. Test Comput.28(4):48-57 (2011)
• 
  [j11]
  Iraklis Anagnostopoulos,Sotirios Xydis,Alexandros Bartzas,Zhonghai Lu,Dimitrios Soudris,Axel Jantsch:
  Custom Microcoded Dynamic Memory Management for Distributed On-Chip Memory Organizations.IEEE Embed. Syst. Lett.3(2):66-69 (2011)
• 
  [j10]
  Xiaowen Chen,Zhonghai Lu,Axel Jantsch,Shuming Chen,Hai Liu:
  Cooperative communication based barrier synchronization in on-chip mesh architectures.IEICE Electron. Express8(22):1856-1862 (2011)
• 
  [j9]
  Xiaowen Chen,Shuming Chen,Zhonghai Lu,Axel Jantsch:
  Hybrid Distributed Shared Memory Space in Multi-core Processors.J. Softw.6(12):2369-2378 (2011)
• 
  [j8]
  Ning Ma,Zhonghai Lu,Li-Rong Zheng:
  System design of full HD MVC decoding on mesh-based multicore NoCs.Microprocess. Microsystems35(2):217-229 (2011)
• 
  [c61]
  Ming Liu,Zhonghai Lu,Wolfgang Kuehn,Axel Jantsch:
  FPGA-Based Cherenkov Ring Recognition in Nuclear and Particle Physics Experiments.ARC2011:169-180
• 
  [c60]
  Chaochao Feng,Jinwen Li,Zhonghai Lu,Axel Jantsch,Minxuan Zhang:
  Evaluation of deflection routing on various NoC topologies.ASICON2011:163-166
• 
  [c59]
  Abdul Naeem,Xiaowen Chen,Zhonghai Lu,Axel Jantsch:
  Realization and performance comparison of sequential and weak memory consistency models in network-on-chip based multi-core systems.ASP-DAC2011:154-159
• 
  [c58]
  Wenmin Hu,Zhonghai Lu,Axel Jantsch,Hengzhu Liu:
  Power-efficient tree-based multicast support for Networks-on-Chip.ASP-DAC2011:363-368
• 
  [c57]
  Hai Su,Meikang Qiu,Huimin Chen,Zhonghai Lu,Xiao Qin:
  Jamming-resilient multi-radio multi-channel multihop wireless network for smart grid.CSIIRW2011:65
• 
  [c56]
  Abdul Naeem,Axel Jantsch,Xiaowen Chen,Zhonghai Lu:
  Realization and Scalability of Release and Protected Release Consistency Models in NoC Based Systems.DSD2011:47-54
• 
  [c55]
  Fahimeh Jafari,Axel Jantsch,Zhonghai Lu:
  Output process of variable bit-rate flows in on-chip networks based on aggregate scheduling.ICCD2011:445-446
• 
  [c54]
  Chaochao Feng,Minxuan Zhang,Jinwen Li,Jiang Jiang,Zhonghai Lu,Axel Jantsch:
  A Low-Overhead Fault-Aware Deflection Routing Algorithm for 3D Network-on-Chip.ISVLSI2011:19-24
• 
  [c53]
  Zhonghai Lu:
  Cross clock-domain TDM virtual circuits for networks on chips.NOCS2011:209-216
• 
  [c52]
  Huimin She,Zhonghai Lu,Axel Jantsch,Dian Zhou,Li-Rong Zheng:
  Stochastic coverage in event-driven sensor networks.PIMRC2011:915-919
• 
  [c51]
  Wenmin Hu,Zhonghai Lu,Axel Jantsch,Hengzhu Liu,Botao Zhang,Dongpei Liu:
  Network-on-Chip multicasting with low latency path setup.VLSI-SoC2011:290-295
• 
  [c50]
  Huimin She,Zhonghai Lu,Axel Jantsch,Dian Zhou,Li-Rong Zheng:
  Modeling and analysis of Rayleigh fading channels using stochastic network calculus.WCNC2011:1056-1061
• 2010
• 
  [j7]
  Yue Qian,Zhonghai Lu,Wenhua Dou:
  Analysis of Worst-Case Delay Bounds for On-Chip Packet-Switching Networks.IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.29(5):802-815 (2010)
• 
  [j6]
  Fahimeh Jafari,Zhonghai Lu,Axel Jantsch,Mohammad Hossien Yaghmaee:
  Buffer Optimization in Network-on-Chip Through Flow Regulation.IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.29(12):1973-1986 (2010)
• 
  [c49]
  Xiaowen Chen,Zhonghai Lu,Axel Jantsch,Shuming Chen:
  Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller.DATE2010:39-44
• 
  [c48]
  Ming Liu,Zhonghai Lu,Wolfgang Kuehn,Axel Jantsch:
  FPGA-based adaptive computing for correlated multi-stream processing.DATE2010:973-976
• 
  [c47]
  Fahimeh Jafari,Zhonghai Lu,Axel Jantsch,Mohammad Hossien Yaghmaee:
  Optimal regulation of traffic flows in networks-on-chip.DATE2010:1621-1624
• 
  [c46]
  Zhi Zhang,Zhonghai Lu,Qiang Chen,Xiaolang Yan,Li-Rong Zheng:
  COSMO: CO-Simulation with MATLAB and OMNeT++ for Indoor Wireless Networks.GLOBECOM2010:1-6
• 
  [c45]
  Zhi Zhang,Zhonghai Lu,Zhibo Pang,Xiaolang Yan,Qiang Chen,Li-Rong Zheng:
  A Low Delay Multiple Reader Passive RFID System Using Orthogonal TH-PPM IR-UWB.ICCCN2010:1-6
• 
  [c44]
  Yue Qian,Zhonghai Lu,Qiang Dou:
  QoS scheduling for NoCs: Strict Priority Queueing versus Weighted Round Robin.ICCD2010:52-59
• 
  [c43]
  Abdul Naeem,Xiaowen Chen,Zhonghai Lu,Axel Jantsch:
  Scalability of weak consistency in NoC based multicore architectures.ISCAS2010:3497-3500
• 
  [c42]
  Ming Liu,Zhonghai Lu,Wolfgang Kuehn,Axel Jantsch:
  Inter-process Communication Using Pipes in FPGA-Based Adaptive Computing.ISVLSI2010:80-85
• 
  [c41]
  Bernard Candaele,Sylvain Aguirre,Michel Sarlotte,Iraklis Anagnostopoulos,Sotirios Xydis,Alexandros Bartzas,Dimitris Bekiaris,Dimitrios Soudris,Zhonghai Lu,Xiaowen Chen,Jean-Michel Chabloz,Ahmed Hemani,Axel Jantsch,Geert Vanmeerbeeck,Jari Kreku,Kari Tiensyrjä,Fragkiskos Ieromnimon,Dimitrios Kritharidis,Andreas Wiefrink,Bart Vanthournout,Philippe Martin:
  The MOSART Mapping Optimization for Multi-Core ARchiTectures.ISVLSI (Selected papers)2010:181-195
• 
  [c40]
  Xiaowen Chen,Zhonghai Lu,Axel Jantsch,Shuming Chen,Jianzhuang Lu,Hucheng Wu:
  Supporting Efficient Synchronization in Multi-core NoCs Using Dynamic Buffer Allocation Technique.ISVLSI2010:462-463
• 
  [c39]
  Bernard Candaele,Sylvain Aguirre,Michel Sarlotte,Iraklis Anagnostopoulos,Sotirios Xydis,Alexandros Bartzas,Dimitris Bekiaris,Dimitrios Soudris,Zhonghai Lu,Xiaowen Chen,Jean-Michel Chabloz,Ahmed Hemani,Axel Jantsch,Geert Vanmeerbeeck,Jari Kreku,Kari Tiensyrjä,Fragkiskos Ieromnimon,Dimitrios Kritharidis,Andreas Wiefrink,Bart Vanthournout,Philippe Martin:
  Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach.ISVLSI2010:518-523
• 
  [c38]
  Chaochao Feng,Zhonghai Lu,Axel Jantsch,Jinwen Li,Minxuan Zhang:
  A reconfigurable fault-tolerant deflection routing algorithm based on reinforcement learning for network-on-chip.NoCArc@MICRO2010:11-16
• 
  [c37]
  Abbas Eslami Kiasari,Axel Jantsch,Zhonghai Lu:
  A framework for designing congestion-aware deterministic routing.NoCArc@MICRO2010:45-50
• 
  [c36]
  Xiaowen Chen,Zhonghai Lu,Axel Jantsch,Shuming Chen:
  Run-Time Partitioning of Hybrid Distributed Shared Memory on Multi-core Network-on-Chips.PAAP2010:39-46
• 
  [c35]
  Ming Liu,Zhonghai Lu,Wolfgang Kuehn,Axel Jantsch:
  Reducing FPGA Reconfiguration Time Overhead using Virtual Configurations.ReCoSoC2010:149-152
• 
  [c34]
  Ning Ma,Zhonghai Lu,Zhibo Pang,Li-Rong Zheng:
  System-level exploration of mesh-based NoC architectures for multimedia applications.SoCC2010:99-104
• 
  [c33]
  Chaochao Feng,Zhonghai Lu,Axel Jantsch,Jinwen Li,Minxuan Zhang:
  FoN: Fault-on-Neighbor aware routing algorithm for Networks-on-Chip.SoCC2010:441-446
• 
  [c32]
  Xiaowen Chen,Zhonghai Lu,Axel Jantsch,Shuming Chen:
  Handling shared variable synchronization in multi-core Network-on-Chips with distributed memory.SoCC2010:467-472
• 
  [e1]
  Maurizio Palesi,Shashi Kumar,Zhonghai Lu,Ümit Y. Ogras:
  Third International Workshop on Network on Chip Architectures, NoCArc'10, Atlanta, GA, USA, December 4, 2010.ACM2010, ISBN978-1-4503-0397-2[contents]

• 2009
• 
  [j5]
  Yue Qian,Zhonghai Lu,Wenhua Dou,Qiang Dou:
  Analyzing Credit-Based Router-to-Router Flow Control for On-Chip Networks.IEICE Trans. Electron.92-C(10):1276-1283 (2009)
• 
  [j4]
  Yue Qian,Zhonghai Lu,Wenhua Dou:
  Worst-Case Flit and Packet Delay Bounds in Wormhole Networks on Chip.IEICE Trans. Fundam. Electron. Commun. Comput. Sci.92-A(12):3211-3220 (2009)
• 
  [j3]
  Abdul Naeem,Xiaowen Chen,Zhonghai Lu,Axel Jantsch:
  Scalability of relaxed consistency models in NoC based multicore architectures.SIGARCH Comput. Archit. News37(5):8-15 (2009)
• 
  [c31]
  Matt Grange,Awet Yemane Weldezion,Dinesh Pamunuwa,Roshan Weerasekera,Zhonghai Lu,Axel Jantsch,Dave Shippen:
  Physical mapping and performance study of a multi-clock 3-Dimensional Network-on-Chip mesh.3DIC2009:1-7
• 
  [c30]
  Awet Yemane Weldezion,Zhonghai Lu,Roshan Weerasekera,Hannu Tenhunen:
  3-D memory organization and performance analysis for multi-processor network-on-chip architecture.3DIC2009:1-7
• 
  [c29]
  Yue Qian,Zhonghai Lu,Wenhua Dou:
  Analysis of communication delay bounds for network on chips.ASP-DAC2009:7-12
• 
  [c28]
  Yue Qian,Zhonghai Lu,Wenhua Dou:
  Applying network calculus for performance analysis of self-similar traffic in on-chip networks.CODES+ISSS2009:453-460
• 
  [c27]
  Zhonghai Lu,Mikael Millberg,Axel Jantsch,Alistair C. Bruce,Pieter van der Wolf,Tomas Henriksson:
  Flow regulation for on-chip communication.DATE2009:578-581
• 
  [c26]
  Li Tong,Zhonghai Lu,Hua Zhang:
  Exploration of Slot Allocation for On-Chip TDM Virtual Circuits.DSD2009:127-132
• 
  [c25]
  Ming Liu,Wolfgang Kuehn,Zhonghai Lu,Axel Jantsch:
  Run-time Partial Reconfiguration speed investigation and architectural design space exploration.FPL2009:498-502
• 
  [c24]
  Yue Qian,Zhonghai Lu,Wenhua Dou:
  From 2D to 3D NoCs: A case study on worst-case communication performance.ICCAD2009:555-562
• 
  [c23]
  Yue Qian,Zhonghai Lu,Wenhua Dou:
  Analysis of worst-case delay bounds for best-effort communication in wormhole networks on chip.NOCS2009:44-53
• 
  [c22]
  Awet Yemane Weldezion,Matt Grange,Dinesh Pamunuwa,Zhonghai Lu,Axel Jantsch,Roshan Weerasekera,Hannu Tenhunen:
  Scalability of network-on-chip communication architecture for 3-D meshes.NOCS2009:114-123
• 
  [c21]
  Ming Liu,Zhonghai Lu,Wolfgang Kuehn,Shuo Yang,Axel Jantsch:
  A Reconfigurable Design Framework for FPGA Adaptive Computing.ReConFig2009:439-444
• 
  [c20]
  Zhonghai Lu,Dimitris Brachos,Axel Jantsch:
  A flow regulator for On-Chip Communication.SoCC2009:151-154
• 
  [c19]
  Huimin She,Zhonghai Lu,Axel Jantsch,Dian Zhou,Li-Rong Zheng:
  Analytical Evaluation of Retransmission Schemes in Wireless Sensor Networks.VTC Spring2009
• 2008
• 
  [j2]
  Zhonghai Lu,Axel Jantsch:
  TDM Virtual-Circuit Configuration for Network-on-Chip.IEEE Trans. Very Large Scale Integr. Syst.16(8):1021-1034 (2008)
• 
  [c18]
  Yu Wang,Kai Zhou,Zhonghai Lu,Huazhong Yang:
  Dynamic TDM virtual circuit implementation for NoC.APCCAS2008:1533-1536
• 
  [c17]
  Zhonghai Lu,Lei Xia,Axel Jantsch:
  Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip.DDECS2008:92-97
• 
  [c16]
  Ming Liu,Wolfgang Kuehn,Zhonghai Lu,Axel Jantsch:
  System-on-an-FPGA Design for Real-time Particle Track Recognition and Reconstruction in Physics Experiments.DSD2008:599-605
• 
  [c15]
  Ming Liu,Johannes Lang,Shuo Yang,Tiago Perez,Wolfgang Kuehn,Hao Xu,Dapeng Jin,Qiang Wang,Lu Li,Zhen'An Liu,Zhonghai Lu,Axel Jantsch:
  ATCA-based computation platform for data acquisition and triggering in particle physics experiments.FPL2008:287-292
• 2007
• 
  [b1]
  Zhonghai Lu:
  Design and Analysis of On-Chip Communication for Network-on-Chip Platforms. Royal Institute of Technology, Stockholm, Sweden,2007
• 
  [j1]
  Zhonghai Lu,Axel Jantsch:
  Admitting and ejecting flits in wormhole-switched networks on chip.IET Comput. Digit. Tech.1(5):546-556 (2007)
• 
  [c14]
  Zhonghai Lu,Ming Liu,Axel Jantsch:
  Layered Switching for Networks on Chip.DAC2007:122-127
• 
  [c13]
  Huimin She,Zhonghai Lu,Axel Jantsch,Li-Rong Zheng,Dian Zhou:
  Traffic Splitting with Network Calculus for Mesh Sensor Networks.FGCN (2)2007:368-373
• 
  [c12]
  Ming Liu,Wolfgang Kuehn,Zhonghai Lu,Axel Jantsch,Shuo Yang,Tiago Perez,Zhen'An Liu:
  Hardware/Software Co-design of a General-Purpose Computation Platform in Particle Physics.FPT2007:177-183
• 
  [c11]
  Zhonghai Lu,Axel Jantsch:
  Slot allocation using logical networks for TDM virtual-circuit configuration for network-on-chip.ICCAD2007:18-25
• 
  [c10]
  Zhonghai Lu,Jonas Sicking,Ingo Sander,Axel Jantsch:
  Using Synchronizers for Refining Synchronous Communication onto Hardware/Software Architectures.IEEE International Workshop on Rapid System Prototyping2007:143-149
• 2006
• 
  [c9]
  Zhonghai Lu,Ingo Sander,Axel Jantsch:
  Towards Performance-Oriented Pattern-Based Refinement of Synchronous Models onto NoC Communication.DSD2006:37-44
• 
  [c8]
  Zhonghai Lu,Mingchen Zhong,Axel Jantsch:
  Evaluation of on-chip networks using deflection routing.ACM Great Lakes Symposium on VLSI2006:296-301
• 
  [c7]
  Zhonghai Lu,Bei Yin,Axel Jantsch:
  Connection-oriented Multicasting in Wormhole-switched Networks on Chip.ISVLSI2006:205-210
• 2005
• 
  [c6]
  Zhonghai Lu,Axel Jantsch,Ingo Sander:
  Feasibility analysis of messages for on-chip networks using wormhole routing.ASP-DAC2005:960-964
• 
  [c5]
  Zhonghai Lu,Ingo Sander,Axel Jantsch:
  Refinement of Perfectly Synchronous Communication Model.FDL2005:453-465
• 
  [c4]
  Zhonghai Lu,Axel Jantsch:
  Traffic Configuration for Evaluating Networks on Chips.IWSOC2005:535-540
• 2004
• 
  [c3]
  Zhonghai Lu,Axel Jantsch:
  Flit admission in on-chip wormhole-switched networks with virtual channels.SoC2004:21-24
• 2003
• 
  [c2]
  Ingo Sander,Axel Jantsch,Zhonghai Lu:
  Development and Application of Design Transformations in ForSyDe.DATE2003:10364-10369
• 
  [p1]
  Zhonghai Lu,Raimo Haukilahti:
  NoC Application Programming Interfaces.Networks on Chip2003:239-260
• 2002
• 
  [c1]
  Ingo Sander,Axel Jantsch,Zhonghai Lu:
  A Case Study of Hardware and Software Synthesis in ForSyDe.ISSS2002:86-91