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Schloss Dagstuhl - Leibniz Center for Informatics
For some weeks now, the dblp team has been receiving anexceptionally high number of support and error correction requests from the community. While we are grateful and happy to process all incoming emails, please assume thatit will currently take us several weeks to read and address your request. Most importantly,please refrain from sending your request multiple times. This will not advance your issue and will only complicate and extend the time required to address it. Thank you for your understanding.
Joint Declaration:The freedom of science is at the heart of liberal, democratic societies. Without this freedom, it is impossible for scientific efforts to be geared toward gaining knowledge and facts. It is therefore extremely worrying that the scientific freedom is coming under increasing pressure in various regions of the world.(read more)
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26th ASP-DAC 2021: Tokyo, Japan

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    1A:University Design Contest I

    1B:Accelerating Design and Simulation

    1C:Process-in-Memory for Efficient and Robust AI

    1D:Validation and Verification

    1E:Design Automation Methods for Various Microfluidic Platforms

    2A:University Design Contest II

    2B:Emerging Non-Volatile Processing-In-Memory for Next Generation Computing

    2C:Emerging Trends for Cross-Layer Co-Design:From Device, Circuit, to Architecture, Application

    2D:Machine Learning Techniques for EDA in Analog/Mixed-Signal ICs

    2E:Innovating Ideas in VLSI Routing Optimization

    3A:ML-Driven Approximate Computing

    3B:Architecture-Level Exploration

    3C:Core Circuits for AI Accelerators

    3D:Stochastic and Approximate Computing

    3E:Timing Analysis and Timing-Aware Design

    4A:Technological Advancements inside the AI chips, and using the AI Chips

    4B:System-Level Modeling, Simulation, and Exploration

    4C:Neural Network Optimizations for Compact AI Inference

    4D:Brain-Inspired Computing

    4E:Cross-Layer Hardware Security

    5B:Embedded Operating Systems and Information Retrieval

    5C:Security Issues in AI and Their Impacts on Hardware Security

    5D:Advances in Logic and High-level Synthesis

    5E:Hardware-Oriented Threats and Solutions in Neural Networks

    6B:Advanced Optimizations for Embedded Systems

    6C:Design and Learning of Logic Circuits and Systems

    6D:Hardware Locking and Obfuscation

    6E:Efficient Solutions for Emerging Technologies

    7A:Platform-Specific Neural Network Acceleration

    7B:Toward Energy-Efficient Embedded Systems

    7C:Software and System Support for Nonvolatile Memory

    7D:Learning-Driven VLSI Layout Automation Techniques

    7E:DNN-Based Physical Analysis and DNN Accelerator Design

    8B:Embedded Neural Networks and File Systems

    8C:Design Automation for Future Autonomy

    8D:Emerging Hardware Verification

    8E:Optimization and Mapping Methods for Quantum Technologies

    9B:Emerging System Architectures for Edge-AI

    9C:Cutting-Edge EDA Techniques for Advanced Process Technologies

    9D:Robust and Reliable Memory Centric Computing at Post-Moore

    9E:Design for Manufacturing and Soft Error Tolerance

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    dblp was originally created in 1993 at:

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    since 2018, dblp has been operated and maintained by:

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