Customize to the core
Set your creativity free with Codasip Studio and our RISC-V powered processors.
Use our highly automated design toolset to efficiently shape your next idea. Codasip Studio is a unique collection of tools for fast and easy designing or modification of processors. It works with CodAL, our design language, which is used to describe both the ISA and the microarchitecture and covers every aspect of the design process. This makes the path to your next successful product supremely smooth, fast, and low-risk. Whether you modify an existing Codasip RISC-V processor, design a new processor from scratch, or create a software development kit for your existing architecture, Codasip Studio will generate everything you need to be ready for production.
Key capabilities of Codasip Studio include:
- Rapid architecture exploration and prototyping
- Automated generation of a custom compiler that understands your custom hardware and how to take advantage of it
- Automated generation of power and area-optimized synthesizable, human-readable RTL
Meet Codasip Studio Fusion
Codasip Studio has been the toolset to generate both the RTL and the software development tools from one processor model for years.
The latest version, Codasip Studio Fusion, improves this fundamental capability and adds a layer of segmentation. You can configure the core from set options, create custom instructions within set bounds, or design freely.
What’s new?
Higher degree of design automation
- New CodAL 3.0 language extended with design constructs allowing to fuse the architectural and microarchitectural description of the processor
- Declarative description of common processor aspect automatically converted into low-level logic by Studio
- Used in Codasip L110 baseline core or deployable in your custom processor design
Improved software development tools
- C/C++ compiler generated by Studio optimized for microarchitectural details captured in processor CodAL description
- Support for new standard and proprietary code size reduction instruction set extensions
- Studio Fusion generates new SystemC-based event-driven simulation model able to simulate parallel behavior in the processor core or cluster
Levels of customization
- Configurator lets you experiment with available core configuration options keeping RTL and SDK in synch
- Bounded customization lets you implement custom instructions without risk
- Full Designer offers complete freedom
Don’t let hardware be a bottleneck to your software
Configure
- Explore configuration options for our RISC-V processors in a user-friendly graphical interface
- Instantly generate the RTL and software development toolkit
- Profile benchmarks or your own code
- No processor design experience is needed
Customize within bounds
- Add custom instructions without risk
- Follow a set of rules allowing for many common customizations
- Instantly generate custom RTL and software development toolkit
- The functionality of the baseline core is guaranteed
- The verification of custom instructions is aided by the provided verification framework
Co-optimize hardware and software
- Experiment with different configurations
- Use Profiler to identify the right custom instructions
- Simplified verification of custom core
- Full Designer offers complete freedom to customize outside bounds
