A Room Temperature 0.1 /spl mu/m CMOS on SOI

@article{Shahidi1993ART,  title={A Room Temperature 0.1 /spl mu/m CMOS on SOI},  author={Ghavam G. Shahidi and C. Blair and Klaus Dietrich Beyer and Thomas J. Bucelot and Taqi N. Buti and P. Chang and Sanford Chu and Philip J. Coane and James H. Comfort and Bijan Davari and Robert H. Dennard and Stephen S. Furkay and Harold Hovel and James M. Johnson and David P. Klaus and K. Kiewtniack and R. Logan and Tom Lii and Patricia A. McFarland and N. J. Mazzeo and Dan Moy and Scott Neely and Tak H. Ning and M. D. Rodriguez and D. Sadaria and S. Stiffier and J. Y.-C. Sun and F. Swell and James D. Warnock},  journal={Symposium 1993 on VLSI Technology},  year={1993},  pages={27-28},  url={https://api.semanticscholar.org/CorpusID:108832941}}
An advanced 0.1 /spl mu/m CMOS technology on SOI is presented, and excellent short channel effects (SCE) down to channel lengths below 0.

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