#
zinq
Here is 1 public repository matching this topic...
Stress test power subsystem of your Xilinx FPGA board
developmentboardfpgatestpowerverilogxilinxsystemverilogcoolingsocshift-registerdigilentartyultrascalezinq
- Updated
Apr 8, 2018 - SystemVerilog
Improve this page
Add a description, image, and links to thezinq topic page so that developers can more easily learn about it.
Add this topic to your repo
To associate your repository with thezinq topic, visit your repo's landing page and select "manage topics."