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Incomputing, aninter-processor interrupt (IPI), also known as ashoulder tap, is a special type ofinterrupt by which oneprocessor may interrupt another processor in amultiprocessor system if the interrupting processor requires action from the other processor. Actions that might be requested include:

• Flushes ofmemory management unit caches, such astranslation lookaside buffers, on other processors when memory mappings are changed by one processor;
• Stop when the system is being shut down by one processor.
• Notify an alternate CPU of a malfunction for Alternate CPU Recovery (ACR).
• Notify a processor that higher-priority work is available.
• Notify a processor of work that cannot be done on all processors due to, e.g.,
  • asymmetric access toI/O channels^[1]
  • special features on some processors^[2]

TheM65MP option ofOS/360 used the Direct Control feature of theS/360 to generate an interrupt on another processor; onS/370 and its successors, includingz/Architecture, the SIGNAL PROCESSOR instruction provides a more formalized interface. The documentation for some IBM operating systems refers to this as a shoulder tap.

OnIBM PC compatible computers that use theAdvanced Programmable Interrupt Controller (APIC), IPI signaling is often performed using the APIC. When a CPU wishes to send an interrupt to another CPU, it stores theinterrupt vector and the identifier of the target's local APIC in the Interrupt Command Register (ICR) of its own local APIC. A message is then sent via the APIC bus to the target's local APIC, which then issues a corresponding interrupt to its own CPU.

In a multiprocessor system runningMicrosoft Windows, a processor may interrupt another processor for the following reasons, in addition to the ones listed above:^[3]

1. queue a DISPATCH_LEVEL interrupt to schedule a particular thread for execution;
2. kernel debugger breakpoint.

IPIs are given anIRQL of 29.^[4]

• Interrupt
• Interrupt handler
• Non-maskable interrupt (NMI)

• Interrupts and Exceptions

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