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Intel BGA 2049
The Intel Core Ultra 7 255H is a mobile processor with 16 cores, launched in January 2025. It is part of the Ultra 7 lineup, using the Arrow Lake-H architecture with BGA 2049. Core Ultra 7 255H has 24 MB of L3 cache and operates at 2000 MHz by default, but can boost up to 5.1 GHz, depending on the workload. Intel is making the Core Ultra 7 255H on a 3 nm production node, the transistor count is unknown. The silicon die of the chip is not fabricated at Intel, but at the foundry of TSMC. The multiplier is locked on Core Ultra 7 255H, which limits its overclocking potential.
With a TDP of 28 W, the Core Ultra 7 255H consumes only little energy. Intel's processor supports DDR5 and LPDDR5X memory with a dual-channel interface. The highest officially supported memory speed is 6400 MT/s. ECC memory is supported, too, which is an important capability for mission-critical systems, to avoid data corruption. For communication with other components in the machine, Core Ultra 7 255H uses a PCI-Express Gen 5 connection. This processor features the Arc Graphics 140T integrated graphics solution.
Hardware virtualization is available on the Core Ultra 7 255H, which greatly improves virtual machine performance. Additionally, IOMMU virtualization (PCI passthrough) is supported, so that guest virtual machines may directly use host hardware. Programs using Advanced Vector Extensions (AVX) can run on this processor, boosting performance for calculation-heavy applications. Besides AVX, Intel is including the newer AVX2 standard, too, but not AVX-512. This processor is equipped with a Neural Processing Unit (NPU) that comes with a performance rating of up to 13 TOPS.
Physical
| Socket: | Intel BGA 2049 |
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| Foundry: | TSMC |
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| Process Size: | 3 nm |
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| SoC Tile Process: | TSMC N6 |
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| I/O Tile Process: | TSMC N6 |
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| Graphics Tile Process: | TSMC N5 |
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| Package: | FC-BGA |
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| tJMax: | 110°C |
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Processor
| Market: | Mobile |
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| Production Status: | Active |
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| Release Date: | Jan 13th, 2025 |
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| Part#: | SRQAN |
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Performance
| Frequency: | 2000 MHz |
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| Turbo Clock: | up to 5.1 GHz |
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| E-Core Frequency: | 1500 MHz up to 4.4 GHz |
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| LP E-Core Frequency: | 700 MHz up to 2.5 GHz |
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| Base Clock: | 100 MHz |
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| NPU: | Yes /13 TOPS |
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| Multiplier: | 20.0x |
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| Multiplier Unlocked: | No |
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| TDP: | 28 W |
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| PL1: | 28 W |
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| PL2: | 60 W |
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| cTDP: | 45 W |
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| cTDP PL2: | 115 W |
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Architecture
| Codename: | Arrow Lake-H |
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| Generation: | Ultra 7 (Arrow Lake-H) |
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| Memory Support: | DDR5, LPDDR5X |
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| Rated Speed: | 6400 MT/s |
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| LPDDR5x Speed: | 8400 MT/s |
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| Memory Bus: | Dual-channel |
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| Memory Bandwidth: | 102.4 GB/s |
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| ECC Memory: | Yes |
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| PCI-Express: | Gen 5, 20 Lanes (CPU only) |
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| Secondary PCIe: | Gen 4, 4 Lanes |
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| Chipsets: | WM880, HM870 |
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Core Config
| # of Cores: | 16 |
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| # of Threads: | 16 |
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| Hybrid Cores: | P-Cores: 6 E-Cores: 10 |
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| LP E-Cores: | 2 |
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| SMP # CPUs: | 1 |
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| Integrated Graphics: | Arc Graphics 140T |
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Cache
| Cache L0-D: | 48 KB (per core) |
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| Cache L0-I: | 64 KB (per core) |
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| Cache L1: | 192 KB (per core) |
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| Cache L2: | 3 MB (per core) |
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| Cache L3: | 24 MB (shared) |
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| E-Core L1: | 96 KB (per core) |
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| E-Core L2: | 4 MB (per module) |
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| LP E-Core L2: | 2 MB (shared) |
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Features
- MMX
- SSE
- SSE2
- SSE3
- SSSE3
- SSE4.1
- SSE4.2
- AVX
- AVX2
- AVX-VNNI
- FMA3
- SHA
- EIST
- Speed Shift
- Intel 64
- XD bit
- VT-x
- VT-x EPT
- VT-d
- AES-NI
- TXT
- TDT
- CLMUL
- F16C
- BMI1
- BMI2
- ABM
- ADX
- MBEC
- CFET
- RdRand
- IPU 6.0
- Thread Director
- DLBoost 3.0
- AI Boost 3.0
- TBMT 3.0
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Notes
Intel Arc Graphics 140T Dynamic Frequency: 300-2250 MHz
Int8 TOPS rated at up to 96 TOPS combined with CPU P and E cores representing 9 TOPS, Xe Graphics 140T GPU cores representing 74 TOPS, and NPU 3 representing 13 TOPS.
"Lion Cove" P-Cores "Skymont" E-Cores
A1 Stepping |