Get info about packages/pins from the IDE files. (YosysHQ#57)* Get info about packages/pins from the IDE files.Signed-off-by: YRabbit <rabbit@yrabbit.cyou>* Rename the function. xls->jsonSigned-off-by: YRabbit <rabbit@yrabbit.cyou>* Remove debugSigned-off-by: YRabbit <rabbit@yrabbit.cyou>* Store partnumber->speed match in the baseSigned-off-by: YRabbit <rabbit@yrabbit.cyou>* Bump the DB versionSigned-off-by: YRabbit <rabbit@yrabbit.cyou>* Fux stupid mistakeSigned-off-by: YRabbit <rabbit@yrabbit.cyou>

Add support for MUX2_LUT5 (YosysHQ#52)* Add support for MUX2_LUT5Both packing and unpacking are supported. Unpacking creates MUX2 primitive.Signed-off-by: YRabbit <rabbit@yrabbit.cyou>* Leave LUTs as LUTSSigned-off-by: YRabbit <rabbit@yrabbit.cyou>* Swap I0 I1Signed-off-by: YRabbit <rabbit@yrabbit.cyou>* Fix the mux wiring diagramSigned-off-by: YRabbit <rabbit@yrabbit.cyou>* LUT8Signed-off-by: YRabbit <rabbit@yrabbit.cyou>* Fix gowin unpackSigned-off-by: YRabbit <rabbit@yrabbit.cyou>* Fix unpackSigned-off-by: YRabbit <rabbit@yrabbit.cyou>* do not execute match twice* ignore dummy pipsCo-authored-by: Pepijn de Vos <pepijndevos@gmail.com>

Fix the mux documentation.Signed-off-by: YRabbit <rabbit@yrabbit.cyou>

generate GW1NS-2 chipdb on CI

allow different reset polarity in same cls

fix dff packing a bit

Merge branch 'master' of github.com:pepijndevos/apicula

add GW1N-4 to pypi

add GW1N-4 support

switch to openpyxl