vlsi-testing
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FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool
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Jul 2, 2025 - Verilog
This is my senior project. Aims to implement the AI accelerator self-test and self-recovery architecture proposed in the paper "STRAIT: Self-Test and Self-Recovery for AI Accelerator". STRAIT is a unified solution that provides self-test, self-diagnosis, and self-recovery functions for systolic array-based AI accelerators.
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Oct 23, 2025 - Verilog
Config files for my GitHub profile.
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Jun 5, 2025
This project focuses on chip orientation estimation using computer vision techniques in a VLSI testing environment. The provided Python script uses OpenCV to create a bounding box around objects in a given image and returns the angular offset of the objects with notations.
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Feb 1, 2024 - MATLAB
VLSI test project: 4-bit ripple carry adder with random stuck-at fault injection. Supports ATPG-based verification, fault modeling, and simulation for learning and experimentation
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Sep 23, 2025 - Python
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