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MultiZone® Security TEE is the quick and safe way to add security and separation to any RISC-V processors. The RISC-V standard ISA doesn't define TrustZone-like primitives to provide hardware separation. To shield critical functionality from untrusted third-party components, MultiZone provides hardware-enforced, software-defined separation of multi
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Jan 24, 2024 - C
This repository contains the hardware design source files of the Hex Five X300 RISC-V SoC. The X300 is Hex Five's official reference HW platform for its MultiZone Trusted Execution Environment and MultiZone Trusted Firmware. The X300 is an enhanced secure version of the SiFive's Freedom E300 built around the Rocket chip developed at U.C. Berkeley.
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Jan 23, 2024 - Scala
SiFive: development platform for PlatformIO
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Jan 5, 2023 - Python
Archived, please use official SiFive dev/platform
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Aug 28, 2019 - Python
Bare metal programming on the RED-V Thing Plus board (SiFive RISC-V FE310 SoC)
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Jun 23, 2024 - C
A custom development board for the SiFive FE310, a RISC-V microcontroller.
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Dec 29, 2021
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