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memory-hierarchy

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masc-ucsc /esesc

ESESC: A Fast Multicore Simulator

simulator emulation memory-hierarchy sesc

UpdatedNov 5, 2025
C

ZigZag-Project /zigzag-v1

A Fast DNN Accelerator Design Space Exploration Framework.

deep-neural-networks accelerator design-space-exploration memory-hierarchy loop-optimization cost-estimation memory-bandwidth loop-unrolling architecture-search energy-analysis latency-analysis auto-scheduling dataflow-optimization mac-array-utilization

UpdatedAug 10, 2022
Python

computer-systems-CS-APP3e

ahmeducf /computer-systems-CS-APP3e

My solutions of Computer Systems: A Programmer’s Perspective, Third Edition (CS:APP3e) book, the text book for the course, CMU15-213: Introduction to Computer Systems.

c assembly reverse-engineering bit-manipulation processes concurrent-programming performance-analysis linking virtual-memory code-optimization socket-programming memory-hierarchy dynamic-memory-allocation dynamic-linking cache-management

UpdatedMar 25, 2022
C

CacheSimulator

muditbhargava66 /CacheSimulator

A high-performance cache and memory hierarchy simulator built with modern C++17. Features configurable cache levels, advanced prefetching, MESI protocol, and detailed statistics. Ideal for computer architecture education, research, and performance analysis.

research cpp17 performance-analysis computer-architecture cache-simulator memory-hierarchy memory-systems cache-coherence prefetching mesi-protocol

UpdatedSep 2, 2025
C++

toshioendo /hhrt

HHRT: Hybrid Hierarchical Runtime library

gpu mpi cuda memory-hierarchy

UpdatedJul 1, 2017
C++

jonnor /acm2019-compress

Hardware compression for memory

data-compression memory-hierarchy

UpdatedJul 19, 2019
Jupyter Notebook

yigitbektasgursoy /cache_simulator

A comprehensive C++20 cache simulator for analyzing memory hierarchy performance with configurable cache levels, replacement policies, and inclusion strategies

performance-analysis computer-architecture cache-simulator memory-hierarchy cpp20 replacement-policy

UpdatedMay 27, 2025
C++

marcotulio956 /cache.coherencyLAOCII

Exerting coherency between caches with protocols in a Memory-Shared Multiprocessors system whether it has uniform memory access(UMA, symmetric) or not(non-UMA).

cache verilog computer-architecture memory-hierarchy computer-organization multiprocessor cache-memory coherence-protocol

UpdatedAug 23, 2022
Verilog

hagary /processor-simulator

A superscalar out-of‐order architectural simulator (With Memory Hierarchy).

java processor object-oriented microprocessor speculation memory-hierarchy processor-simulator tomasulo registers branch-prediction

UpdatedDec 10, 2016
Java

toshioendo /hoalgos

Implementation of Hierarchy Oblivious Algorithms

gpu simd multicore memory-hierarchy avx-512

UpdatedSep 3, 2019
C++

juanfresia /cacheSimulator

A loop test performance simulator for cache memories

cache-simulator memory-hierarchy loop-tests

UpdatedMar 18, 2019
Java

Vicky-Christofilopoulou /Cache-Memory

The task is to design a "family" of three microprocessors that differ in performance and cost for the same computational task, as a project in "Computer Architecture 2" course.

assembly performance-metrics matrix-multiplication memory-hierarchy cache-memory

UpdatedJan 15, 2025
Assembly

UphillD /2020-ACA-Project

(ECE) A collection of helper scripts for the assignments for the course "Advanced Computer Architecture" [3.4.37.8]

pintool memory-hierarchy parsec-benchmark

UpdatedApr 14, 2020
Shell

marcotulio956 /cache.associative4ways.lruLAOCII

cache memory-cache computer-architecture l1 memory-hierarchy computer-organization

UpdatedOct 7, 2021
Verilog

ORNL /papyrus

Papyrus: Parallel Aggregate Persistent Storage

hpc mpi pgas non-volatile-memory memory-hierarchy key-value-store programming-models

UpdatedNov 23, 2021
C++

IslamWalid /cache_simulator

A simulator of cache system behavior.

c memory-hierarchy cache-memory

UpdatedDec 14, 2021
C

Shihara1020 /CO224-Building_Processor

CO224 Computer Architecture Labs - 8-bit Single-Cycle Processor Implementation .

instruction-set-architecture memory-hierarchy verilog-project cache-implementation single-cycle-cpu alu-design computer-architecture-and-assembly-language 8-bit-processor

UpdatedOct 10, 2025
Verilog

filippovf /memory-hierarchy

A bash shell script to show information about memory hierarchy. PT-br: Um script shell para mostrar informações sobre a hierarquia de memória.

linux memory memory-hierarchy

UpdatedMay 9, 2025
Shell

Anand-786 /gem5-cache-optimization-strategy

Cache optimization strategy, primarily Victim Cache analysis in gem5 involving performance experiments with micro-benchmarks and workloads.

cache performance-analysis computer-architecture memory-hierarchy gem5 victim-cache

UpdatedSep 24, 2025
C++

UellingtonDamasceno /DGEMM-memory-analysis

Análise: Influência da organização da memória no desempenho em algoritmos de multiplicação de matriz geral de precisão dupla (DGEMM).

benchmark processor architecture memory-hierarchy dgemm

UpdatedNov 4, 2020
C

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