branch-prediction

💻 RISC-V Simulator of RV32I ISA. 5-stage pipeline / out-of-order execution with Tomasulo algorithm and Speculation. Support runtime visualization. Project report available.

cmake cpu pipeline cpp riscv gtest computer-architecture speculation branch-prediction riscv32 riscv-simulator riscv-emulator tomasulo-algorithm

UpdatedJul 2, 2020
C++

sifferman /labs-with-cva6

Star70

Advanced Architecture Labs with CVA6

caching education systemverilog virtual-memory out-of-order risc-v branch-prediction cva6

UpdatedJan 16, 2024
SystemVerilog

sdasgup3 /parallel-processor-design

Star21

Super scalar Processor design

processor-architecture bison flex processor assembler parallel-computing verilog forwarding bypassing pipeline-processor superscalar opcode verilog-hdl instruction-set-architecture instruction-set processor-simulator branch-prediction pipeline-cpu mnemonics instruction-level-parallelism

UpdatedSep 7, 2014
Verilog

hoseinyavarzadeh /Pathfinder_Attack

Star21

Pathfinder: High-Resolution Control-Flow Attacks Exploiting the Conditional Branch Predictor

cpu reverse-engineering computer-architecture computer-security performance-counters branch-prediction

UpdatedJul 4, 2024
Jupyter Notebook

saivittalb /branch-prediction-programming

Star20

🎞 Implementation of several Branch Prediction algorithms and analysis on their effectiveness on real-world program traces.

python cpp visual-studio-code branch-prediction computer-architechure

UpdatedApr 10, 2021
C++

yonseicasl /Kite

Star19

Kite: Architecture Simulator for RISC-V Instruction Set

education simulator pipeline memory model cache assembly architecture pipelining computer-architecture instruction-set-architecture risc-v microarchitecture instruction-set branch-prediction five-stage instruction-dependency

UpdatedJan 2, 2025
C++

ethanelle /Branch-Predictors

Star13

A branch predictor simulator in C++ that tests 6 different types of branch predictors.

cpp branch-prediction

UpdatedApr 26, 2018
C++

rauhul /ece411

Star13

Computer Architecture UIUC SP 2018

cache lc3 branch-prediction cpu-design

UpdatedMay 4, 2018
Assembly

hakula139 /MIPS-CPU

Star10

A MIPS processor with Cache and Advanced Branch Predictor written in SystemVerilog

pipeline cache systemverilog mips-processor branch-prediction

UpdatedDec 26, 2020
SystemVerilog

snie2012 /computer-architecture-projects

Star8

Computer architecture related projects

computer-architecture cache-simulator branch-prediction dynamic-schedule

UpdatedNov 17, 2017
C++

hibagus /TwoLevelBPSimulator

Star8

Two Level Branch Predictor Simulator - EE382N Superscalar Microprocessor Architecture, Spring 2019, Assignment 4

simulator computer-engineering computer-architecture superscalar branch-prediction branch-predictor computer-engineering-lab

UpdatedMay 19, 2020
C++

cwang360 /branch-prediction-visualization

Star6

Tool for visualizing and comparing different dynamic branch prediction methods for a pipelined processor.

computer-architecture branch-prediction

UpdatedOct 27, 2021
Python

maxislash /branchPredictor

Star6

VHDL code of three branch predictors

vhdl computer-engineering computer-architecture branch-prediction branch-predictor

UpdatedJul 15, 2019
VHDL

AleksandarLilic /ama-riscv-sim

Star6

C++ Instruction Set Simulator for RISC-V RV32IMC & custom SIMD instructions with cache and branch predictor models, C/ASM workloads, and Python analysis tools