130nm
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OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
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Feb 26, 2025 - Python
Index of the fully open source process design kits (PDKs) maintained by Google.
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Sep 4, 2022
SKY130 ReRAM and examples (SkyWater Provided)
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Apr 20, 2022
PLL x8 clock multiplier IP integrated onto the Efabless Caravel SoC
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Dec 8, 2020 - Verilog
Mixed-mode silicon cochlea implementing wavelet processing in 130nm skywater process
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Dec 31, 2021 - Tcl
Mixed-mode silicon cochlea implementing wavelet processing in 130nm skywater process, embedded in efabless Caravel
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Sep 24, 2022 - Verilog
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