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A small FPGA and APSoC project of multiple implementation for testing and comparing color mixing between discrete RGB LEDs and an OLED RGB display
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timothystotts/fpga-colors-tester-3
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FPGA Colors Palette Tester Version 3
by Timothy Stotts
This project version replacesfpga-colors-tester-1andfpga-colors-tester-2.
Now with support for:
- Digilent Inc. Arty S7-25 FPGA development board containing a small Xilinx Spartan-7 FPGA
- Digilent Inc. Arty A7-100 FPGA development board containing a large Xilinx Artix-7 FPGA
- Digilent Inc. Zybo Z7-20 APSoC development board containing a moderate Xilinx Zynq-7000 SoC.
Note that this project is kept as a beginner-level design that students, hobbyists, andFPGA enthusiasts may find interesting.
Notes:
- The MicroBlaze example followed this tutorial as a starting point:
- https://digilent.com/reference/learn/programmable-logic/tutorials/arty-getting-started-with-microblaze-servers/start
- Note that the MicroBlaze example requires Xilinx Vivado 2021.2. The DDR MIG is driven by two MMCM clocks in a way that is possibily incompatible with newer versions of Vivado. Newer versions of Vivado may require a revised block design to achieve a functional design.
- Board part install scripts are now provided in the top directory. They require manual path modification prior to execution. Choose a Windows or Linux path and update it.
- The project init scripts may have failed prior on some systems. It is required to install the board part first with an install_ script. And the init_ scripts were modified on 2024-08-10 to not use checkpoints or set the board repo path. This solves Vivado looking for paths that do not exist on other systems.
- The three block design examples requrie a right-click for adding a system wrapper. First generate the block design with the IPI-BD script. Then right-click on the block design under source and select generate an HDL wrapper. This is required prior to synthesis.
A small FPGA project of different implementations for testing 24-bit color palette PWM mixing of discrete RGB LEDsversus 16-bit color mixing of a 96x64 OLEDrgb display's text.
The Xilinx MicroBlaze designs can now target either of two FPGA development boards produced by Digilent Inc; one beinglower cost.
- Digilent Inc. Arty S7-25 FPGA development board containing a small Xilinx Spartan-7 FPGA
- Digilent Inc. Arty A7-100 FPGA development board containing a large Xilinx Artix-7 FPGA
Two peripherals are used: Digilent Inc. Pmod KYPD, Digilent Inc. Pmod OLEDrgb.
Additionally, the Xilinx Zynq design targets the
- Digilent Inc. Zybo Z7-20 FPGA development board containing a Xilinx Zynq-7000 APSoC.
Two peripherals are used: Digilent Inc. Pmod KYPD, Digilent Inc. Pmod OLEDrgb.
The design is broken into three groupings.The first group targets the Digilent Inc. Arty A7-100 development board.The second group targets the Digilent Inc. Arty S7-25 development board.The last group targets the Digilent Inc. Zybo Z7-20 development board.The projects are likely portable to the smaller Arty A7-35 and Zybo Z7-10respectively as the designs are low resource utilization.
The folder Color-Tester-Design-MB-A7 contains a Xilinx Vivado IP Integrator plusXilinx Vitis design. A MicroBlaze soft CPU is instantiated to talk with board components,a 4x4 alphanumeric keypad, and 96x64 pixel color display.Source to be incorporated into a Xilinx Vitis project containa very small Standalone program in C; drivers for the peripherals; and a main loop to repeatedlyread keypad entry and then update both discrete LEDs and display.This design targets the Arty A7-100 development board.
The folder Color-Tester-Design-MB-S7 contains a Xilinx Vivado IP Integrator plusXilinx Vitis design. The design is essentially the same as the Color-Tester-Design-MB-A7 mentionedabove, but instead targets the Arty S7-25 development board, including the differences in availableboard components, such as count of RGB LEDs.
The folder Colors-Tester-Design-Zynq contains a Xilinx Vivado IP Integrator plus Xilinx Vitisdesign. The Zynq hard ARM CPU #0 is configured to talk with board components, a 4x4 alphanumerickeypad, and 96x64 pixel color display. Its functionality is mostly equivalent to that of theColor-Tester-Design-MB-A7 design, but differs in the count of RGB LEDs.
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A small FPGA and APSoC project of multiple implementation for testing and comparing color mixing between discrete RGB LEDs and an OLED RGB display
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