77 ******************************************************************************
88 * @attention
99 *
10- * Copyright (c)2023 STMicroelectronics.
10+ * Copyright (c)2021 STMicroelectronics.
1111 * All rights reserved.
1212 *
1313 * This software is licensed under terms that can be found in the LICENSE file
@@ -37,16 +37,12 @@ extern "C" {
3737#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
3838#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
3939#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
40- #if defined(STM32U5 ) || defined( STM32H7 )|| defined(STM32MP1 )
40+ #if defined(STM32H7 )|| defined(STM32MP1 )
4141#define CRYP_DATATYPE_32B CRYP_NO_SWAP
4242#define CRYP_DATATYPE_16B CRYP_HALFWORD_SWAP
4343#define CRYP_DATATYPE_8B CRYP_BYTE_SWAP
4444#define CRYP_DATATYPE_1B CRYP_BIT_SWAP
45- #if defined(STM32U5 )
46- #define CRYP_CCF_CLEAR CRYP_CLEAR_CCF
47- #define CRYP_ERR_CLEAR CRYP_CLEAR_RWEIF
48- #endif /* STM32U5 */
49- #endif /* STM32U5 || STM32H7 || STM32MP1 */
45+ #endif /* STM32H7 || STM32MP1 */
5046/**
5147 * @}
5248 */
@@ -279,7 +275,7 @@ extern "C" {
279275#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
280276#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
281277
282- #if defined(STM32G4 )|| defined(STM32L5 ) || defined( STM32H7 )|| defined (STM32U5 )
278+ #if defined(STM32G4 )|| defined(STM32H7 )|| defined (STM32U5 )
283279#define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL
284280#define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL
285281#endif
@@ -552,6 +548,16 @@ extern "C" {
552548#define OB_SRAM134_RST_ERASE OB_SRAM_RST_ERASE
553549#define OB_SRAM134_RST_NOT_ERASE OB_SRAM_RST_NOT_ERASE
554550#endif /* STM32U5 */
551+ #if defined(STM32U0 )
552+ #define OB_USER_nRST_STOP OB_USER_NRST_STOP
553+ #define OB_USER_nRST_STDBY OB_USER_NRST_STDBY
554+ #define OB_USER_nRST_SHDW OB_USER_NRST_SHDW
555+ #define OB_USER_nBOOT_SEL OB_USER_NBOOT_SEL
556+ #define OB_USER_nBOOT0 OB_USER_NBOOT0
557+ #define OB_USER_nBOOT1 OB_USER_NBOOT1
558+ #define OB_nBOOT0_RESET OB_NBOOT0_RESET
559+ #define OB_nBOOT0_SET OB_NBOOT0_SET
560+ #endif /* STM32U0 */
555561
556562/**
557563 * @}
@@ -1243,10 +1249,10 @@ extern "C" {
12431249#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
12441250#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
12451251
1246- #if defined(STM32H5 )
1252+ #if defined(STM32H5 )|| defined( STM32H7RS )
12471253#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
12481254#define TAMP_SECRETDEVICE_ERASE_BKP_SRAM TAMP_DEVICESECRETS_ERASE_BKPSRAM
1249- #endif /* STM32H5 */
1255+ #endif /* STM32H5|| STM32H7RS */
12501256
12511257#if defined(STM32WBA )
12521258#define TAMP_SECRETDEVICE_ERASE_NONE TAMP_DEVICESECRETS_ERASE_NONE
@@ -1258,10 +1264,10 @@ extern "C" {
12581264#define TAMP_SECRETDEVICE_ERASE_ALL TAMP_DEVICESECRETS_ERASE_ALL
12591265#endif /* STM32WBA */
12601266
1261- #if defined(STM32H5 )|| defined(STM32WBA )
1267+ #if defined(STM32H5 )|| defined(STM32WBA )|| defined( STM32H7RS )
12621268#define TAMP_SECRETDEVICE_ERASE_DISABLE TAMP_DEVICESECRETS_ERASE_NONE
12631269#define TAMP_SECRETDEVICE_ERASE_ENABLE TAMP_SECRETDEVICE_ERASE_ALL
1264- #endif /* STM32H5 || STM32WBA */
1270+ #endif /* STM32H5 || STM32WBA|| STM32H7RS */
12651271
12661272#if defined(STM32F7 )
12671273#define RTC_TAMPCR_TAMPXE RTC_TAMPER_ENABLE_BITS_MASK
@@ -1599,6 +1605,8 @@ extern "C" {
15991605#define ETH_MAC_SMALL_FIFO_RW_ACTIVE 0x00000006U/* MAC small FIFO read / write controllers active */
16001606#define ETH_MAC_MII_RECEIVE_PROTOCOL_ACTIVE 0x00000001U/* MAC MII receive protocol engine active */
16011607
1608+ #define ETH_TxPacketConfig ETH_TxPacketConfigTypeDef/* Transmit Packet Configuration structure definition */
1609+
16021610/**
16031611 * @}
16041612 */
@@ -1991,12 +1999,12 @@ extern "C" {
19911999/** @defgroup HAL_RTC_Aliased_Functions HAL RTC Aliased Functions maintained for legacy purpose
19922000 * @{
19932001 */
1994- #if defined(STM32H5 )|| defined(STM32WBA )
2002+ #if defined(STM32H5 )|| defined(STM32WBA )|| defined( STM32H7RS )
19952003#define HAL_RTCEx_SetBoothardwareKey HAL_RTCEx_LockBootHardwareKey
19962004#define HAL_RTCEx_BKUPBlock_Enable HAL_RTCEx_BKUPBlock
19972005#define HAL_RTCEx_BKUPBlock_Disable HAL_RTCEx_BKUPUnblock
19982006#define HAL_RTCEx_Erase_SecretDev_Conf HAL_RTCEx_ConfigEraseDeviceSecrets
1999- #endif /* STM32H5 || STM32WBA */
2007+ #endif /* STM32H5 || STM32WBA|| STM32H7RS */
20002008
20012009/**
20022010 * @}
@@ -2311,8 +2319,8 @@ extern "C" {
23112319#define __HAL_COMP_EXTI_CLEAR_FLAG (__FLAG__ ) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
23122320 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
23132321 __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
2314- # endif
2315- # if defined(STM32F302xE )|| defined(STM32F302xC )
2322+ #endif
2323+ #if defined(STM32F302xE )|| defined(STM32F302xC )
23162324#define __HAL_COMP_EXTI_RISING_IT_ENABLE (__EXTILINE__ ) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
23172325 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
23182326 ((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
@@ -2345,8 +2353,8 @@ extern "C" {
23452353 ((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
23462354 ((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
23472355 __HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
2348- # endif
2349- # if defined(STM32F303xE )|| defined(STM32F398xx )|| defined(STM32F303xC )|| defined(STM32F358xx )
2356+ #endif
2357+ #if defined(STM32F303xE )|| defined(STM32F398xx )|| defined(STM32F303xC )|| defined(STM32F358xx )
23502358#define __HAL_COMP_EXTI_RISING_IT_ENABLE (__EXTILINE__ ) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
23512359 ((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
23522360 ((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
@@ -2403,8 +2411,8 @@ extern "C" {
24032411 ((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
24042412 ((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
24052413 __HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
2406- # endif
2407- # if defined(STM32F373xC )|| defined(STM32F378xx )
2414+ #endif
2415+ #if defined(STM32F373xC )|| defined(STM32F378xx )
24082416#define __HAL_COMP_EXTI_RISING_IT_ENABLE (__EXTILINE__ ) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
24092417 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
24102418#define __HAL_COMP_EXTI_RISING_IT_DISABLE (__EXTILINE__ ) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
@@ -2421,7 +2429,7 @@ extern "C" {
24212429 __HAL_COMP_COMP2_EXTI_GET_FLAG())
24222430#define __HAL_COMP_EXTI_CLEAR_FLAG (__FLAG__ ) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
24232431 __HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
2424- # endif
2432+ #endif
24252433#else
24262434#define __HAL_COMP_EXTI_RISING_IT_ENABLE (__EXTILINE__ ) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
24272435 __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
@@ -2723,6 +2731,12 @@ extern "C" {
27232731#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
27242732#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
27252733#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
2734+ #if defined(STM32C0 )
2735+ #define __HAL_RCC_APB1_FORCE_RESET __HAL_RCC_APB1_GRP1_FORCE_RESET
2736+ #define __HAL_RCC_APB1_RELEASE_RESET __HAL_RCC_APB1_GRP1_RELEASE_RESET
2737+ #define __HAL_RCC_APB2_FORCE_RESET __HAL_RCC_APB1_GRP2_FORCE_RESET
2738+ #define __HAL_RCC_APB2_RELEASE_RESET __HAL_RCC_APB1_GRP2_RELEASE_RESET
2739+ #endif /* STM32C0 */
27262740#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
27272741#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
27282742#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
@@ -3646,8 +3660,12 @@ extern "C" {
36463660#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
36473661#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
36483662
3663+ #if defined(STM32U0 )
3664+ #define RCC_SYSCLKSOURCE_STATUS_PLLR RCC_SYSCLKSOURCE_STATUS_PLLCLK
3665+ #endif
3666+
36493667#if defined(STM32L4 )|| defined(STM32WB )|| defined(STM32G0 )|| defined(STM32G4 )|| defined(STM32L5 )|| \
3650- defined(STM32WL )|| defined(STM32C0 )
3668+ defined(STM32WL )|| defined(STM32C0 )|| defined( STM32H7RS ) || defined( STM32U0 )
36513669#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
36523670#else
36533671#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3749,8 +3767,10 @@ extern "C" {
37493767#define __HAL_RCC_GET_DFSDM_SOURCE __HAL_RCC_GET_DFSDM1_SOURCE
37503768#define RCC_DFSDM1CLKSOURCE_PCLK RCC_DFSDM1CLKSOURCE_PCLK2
37513769#define RCC_SWPMI1CLKSOURCE_PCLK RCC_SWPMI1CLKSOURCE_PCLK1
3770+ #if !defined(STM32U0 )
37523771#define RCC_LPTIM1CLKSOURCE_PCLK RCC_LPTIM1CLKSOURCE_PCLK1
37533772#define RCC_LPTIM2CLKSOURCE_PCLK RCC_LPTIM2CLKSOURCE_PCLK1
3773+ #endif
37543774
37553775#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB1 RCC_DFSDM1AUDIOCLKSOURCE_I2S1
37563776#define RCC_DFSDM1AUDIOCLKSOURCE_I2SAPB2 RCC_DFSDM1AUDIOCLKSOURCE_I2S2
@@ -3896,7 +3916,8 @@ extern "C" {
38963916 */
38973917#if defined (STM32G0 )|| defined (STM32L5 )|| defined (STM32L412xx )|| defined (STM32L422xx )|| \
38983918 defined (STM32L4P5xx )|| defined (STM32L4Q5xx )|| defined (STM32G4 )|| defined (STM32WL )|| defined (STM32U5 )|| \
3899- defined (STM32WBA )|| defined (STM32H5 )|| defined (STM32C0 )
3919+ defined (STM32WBA )|| defined (STM32H5 )|| \
3920+ defined (STM32C0 )|| defined (STM32H7RS )|| defined (STM32U0 )
39003921#else
39013922#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
39023923#endif
@@ -3931,6 +3952,13 @@ extern "C" {
39313952 __HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
39323953#endif /* STM32F1 */
39333954
3955+ #if defined (STM32F0 )|| defined (STM32F2 )|| defined (STM32F3 )|| defined (STM32F4 )|| defined (STM32F7 )|| \
3956+ defined (STM32H7 )|| \
3957+ defined (STM32L0 )|| defined (STM32L1 )|| \
3958+ defined (STM32WB )
3959+ #define __HAL_RTC_TAMPER_GET_IT __HAL_RTC_TAMPER_GET_FLAG
3960+ #endif
3961+
39343962#define IS_ALARM IS_RTC_ALARM
39353963#define IS_ALARM_MASK IS_RTC_ALARM_MASK
39363964#define IS_TAMPER IS_RTC_TAMPER
@@ -4212,6 +4240,9 @@ extern "C" {
42124240#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
42134241
42144242#define TIM_BREAKINPUTSOURCE_DFSDM TIM_BREAKINPUTSOURCE_DFSDM1
4243+
4244+ #define TIM_OCMODE_ASSYMETRIC_PWM1 TIM_OCMODE_ASYMMETRIC_PWM1
4245+ #define TIM_OCMODE_ASSYMETRIC_PWM2 TIM_OCMODE_ASYMMETRIC_PWM2
42154246/**
42164247 * @}
42174248 */