|
41 | 41 |
|
42 | 42 | /* USER CODE END PV */ |
43 | 43 |
|
44 | | -HCD_HandleTypeDefhhcd_USB_OTG_FS; |
| 44 | +HCD_HandleTypeDefg_hhcd; |
45 | 45 |
|
46 | 46 | /* USER CODE BEGIN 0 */ |
47 | 47 |
|
@@ -104,6 +104,43 @@ void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd) |
104 | 104 | } |
105 | 105 | } |
106 | 106 | #endif |
| 107 | +#if defined(USB_OTG_HS) |
| 108 | +if (hhcd->Instance==USB_OTG_HS) { |
| 109 | +__HAL_RCC_GPIOB_CLK_ENABLE(); |
| 110 | +map=PinMap_USB_OTG_HS; |
| 111 | +while (map->pin!=NC) { |
| 112 | +pin_function(map->pin,map->function); |
| 113 | +map++; |
| 114 | + } |
| 115 | + |
| 116 | +/* Peripheral clock enable */ |
| 117 | +__HAL_RCC_USB_OTG_HS_CLK_ENABLE(); |
| 118 | + |
| 119 | +/* Set USB HS Interrupt priority */ |
| 120 | +HAL_NVIC_SetPriority(OTG_HS_IRQn,USBH_IRQ_PRIO,USBH_IRQ_SUBPRIO); |
| 121 | + |
| 122 | +/* Enable USB HS Interrupt */ |
| 123 | +HAL_NVIC_EnableIRQ(OTG_HS_IRQn); |
| 124 | + |
| 125 | +if (hhcd->Init.low_power_enable==1) { |
| 126 | +/* Enable EXTI Line 18 for USB wakeup */ |
| 127 | +#ifdef__HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG |
| 128 | +__HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG(); |
| 129 | +#endif |
| 130 | +#ifdef__HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE |
| 131 | +__HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE(); |
| 132 | +#endif |
| 133 | +__HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT(); |
| 134 | +#if !defined(STM32L4xx) |
| 135 | +/* Set EXTI Wakeup Interrupt priority */ |
| 136 | +HAL_NVIC_SetPriority(OTG_HS_WKUP_IRQn,USBH_IRQ_PRIO,USBH_IRQ_SUBPRIO); |
| 137 | + |
| 138 | +/* Enable EXTI Interrupt */ |
| 139 | +HAL_NVIC_EnableIRQ(OTG_HS_WKUP_IRQn); |
| 140 | +#endif |
| 141 | + } |
| 142 | + } |
| 143 | +#endif |
107 | 144 | } |
108 | 145 |
|
109 | 146 | voidHAL_HCD_MspDeInit(HCD_HandleTypeDef*hhcd) |
@@ -200,21 +237,45 @@ USBH_StatusTypeDef USBH_LL_Init(USBH_HandleTypeDef *phost) |
200 | 237 | /* Init USB_IP */ |
201 | 238 | if (phost->id==HOST_FS) { |
202 | 239 | /* Link the driver to the stack. */ |
203 | | -hhcd_USB_OTG_FS.pData=phost; |
204 | | -phost->pData=&hhcd_USB_OTG_FS; |
205 | | - |
206 | | -hhcd_USB_OTG_FS.Instance=USB_OTG_FS; |
207 | | -hhcd_USB_OTG_FS.Init.Host_channels=8; |
208 | | -hhcd_USB_OTG_FS.Init.speed=HCD_SPEED_FULL; |
209 | | -hhcd_USB_OTG_FS.Init.dma_enable=DISABLE; |
210 | | -hhcd_USB_OTG_FS.Init.phy_itface=HCD_PHY_EMBEDDED; |
211 | | -hhcd_USB_OTG_FS.Init.Sof_enable=DISABLE; |
212 | | -if (HAL_HCD_Init(&hhcd_USB_OTG_FS)!=HAL_OK) { |
| 240 | +g_hhcd.pData=phost; |
| 241 | +phost->pData=&g_hhcd; |
| 242 | + |
| 243 | +g_hhcd.Instance=USB_OTG_FS; |
| 244 | +g_hhcd.Init.Host_channels=8; |
| 245 | +g_hhcd.Init.speed=HCD_SPEED_FULL; |
| 246 | +g_hhcd.Init.dma_enable=DISABLE; |
| 247 | +g_hhcd.Init.phy_itface=HCD_PHY_EMBEDDED; |
| 248 | +g_hhcd.Init.Sof_enable=DISABLE; |
| 249 | +if (HAL_HCD_Init(&g_hhcd)!=HAL_OK) { |
213 | 250 | // Error_Handler( ); |
214 | 251 | returnUSBH_FAIL; |
215 | 252 | } |
216 | 253 |
|
217 | | -USBH_LL_SetTimer(phost,HAL_HCD_GetCurrentFrame(&hhcd_USB_OTG_FS)); |
| 254 | +USBH_LL_SetTimer(phost,HAL_HCD_GetCurrentFrame(&g_hhcd)); |
| 255 | + }elseif (phost->id==HOST_HS) { |
| 256 | +/* Link the driver to the stack. */ |
| 257 | +g_hhcd.pData=phost; |
| 258 | +phost->pData=&g_hhcd; |
| 259 | + |
| 260 | +g_hhcd.Instance=USB_OTG_HS; |
| 261 | +g_hhcd.Init.Host_channels=12; |
| 262 | +g_hhcd.Init.speed=HCD_SPEED_FULL; |
| 263 | +g_hhcd.Init.dma_enable=DISABLE; |
| 264 | +#ifdefUSE_USB_HS_IN_FS |
| 265 | +g_hhcd.Init.phy_itface=USB_OTG_EMBEDDED_PHY; |
| 266 | +#else |
| 267 | +g_hhcd.Init.phy_itface=USB_OTG_ULPI_PHY; |
| 268 | +#endif |
| 269 | +g_hhcd.Init.Sof_enable=DISABLE; |
| 270 | +g_hhcd.Init.low_power_enable=DISABLE; |
| 271 | +g_hhcd.Init.vbus_sensing_enable=DISABLE; |
| 272 | +g_hhcd.Init.use_external_vbus=DISABLE; |
| 273 | + |
| 274 | +if (HAL_HCD_Init(&g_hhcd)!=HAL_OK) { |
| 275 | +Error_Handler(); |
| 276 | + } |
| 277 | + |
| 278 | +USBH_LL_SetTimer(phost,HAL_HCD_GetCurrentFrame(&g_hhcd)); |
218 | 279 | } |
219 | 280 | returnUSBH_OK; |
220 | 281 | } |
@@ -245,11 +306,8 @@ USBH_StatusTypeDef USBH_LL_Start(USBH_HandleTypeDef *phost) |
245 | 306 | { |
246 | 307 | HAL_StatusTypeDefhal_status=HAL_OK; |
247 | 308 | USBH_StatusTypeDefusb_status=USBH_OK; |
248 | | - |
249 | 309 | hal_status=HAL_HCD_Start(phost->pData); |
250 | | - |
251 | 310 | usb_status=USBH_Get_USB_Status(hal_status); |
252 | | - |
253 | 311 | returnusb_status; |
254 | 312 | } |
255 | 313 |
|
@@ -549,28 +607,52 @@ USBH_StatusTypeDef USBH_Get_USB_Status(HAL_StatusTypeDef hal_status) |
549 | 607 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
550 | 608 |
|
551 | 609 |
|
552 | | -//#include "stm32f4xx_hal_hcd.c" |
553 | | - |
554 | | -#if !defined(USBCON) |
555 | | - |
556 | | -// extern HCD_HandleTypeDef hhcd_USB_OTG_FS; |
557 | | - |
558 | 610 | /** |
559 | 611 | * @brief This function handles USB-On-The-Go FS/HS global interrupt request. |
560 | 612 | * @param None |
561 | 613 | * @retval None |
562 | 614 | */ |
563 | | -#ifdefUSE_USB_HS |
| 615 | +#ifdefUSE_USBHOST_HS |
564 | 616 | voidOTG_HS_IRQHandler(void) |
565 | 617 | #elif defined(USB_OTG_FS) |
566 | 618 | voidOTG_FS_IRQHandler(void) |
567 | 619 | #else/* USB */ |
568 | 620 | voidUSB_IRQHandler(void) |
569 | 621 | #endif |
570 | 622 | { |
571 | | -HAL_HCD_IRQHandler(&hhcd_USB_OTG_FS); |
| 623 | +HAL_HCD_IRQHandler(&g_hhcd); |
572 | 624 | } |
573 | 625 |
|
574 | | -#endif// !defined(USBCON) |
| 626 | +/** |
| 627 | + * @brief This function handles USB OTG HCD Wakeup IRQ Handler. |
| 628 | + * @param None |
| 629 | + * @retval None |
| 630 | + */ |
| 631 | +#ifdefUSE_USBHOST_HS |
| 632 | +voidOTG_HS_WKUP_IRQHandler(void) |
| 633 | +#elif defined(USB_OTG_FS) |
| 634 | +voidOTG_FS_WKUP_IRQHandler(void) |
| 635 | +#else |
| 636 | +voidUSBWakeUp_IRQHandler(void) |
| 637 | +#endif |
| 638 | +{ |
| 639 | +if ((&g_hhcd)->Init.low_power_enable) { |
| 640 | +/* Reset SLEEPDEEP bit of Cortex System Control Register */ |
| 641 | +SCB->SCR &= (uint32_t)~((uint32_t)(SCB_SCR_SLEEPDEEP_Msk |SCB_SCR_SLEEPONEXIT_Msk)); |
| 642 | + |
| 643 | +/* Configures system clock after wake-up from STOP: enable HSE, PLL and select |
| 644 | + PLL as system clock source (HSE and PLL are disabled in STOP mode) */ |
| 645 | +SystemClock_Config(); |
| 646 | + } |
| 647 | +#if defined(USE_USBHOST_HS)&& defined(__HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG) |
| 648 | +/* Clear EXTI pending Bit*/ |
| 649 | +__HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG(); |
| 650 | +#elif defined(USB_OTG_FS)&& defined(__HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG) |
| 651 | +/* Clear EXTI pending Bit*/ |
| 652 | +__HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG(); |
| 653 | +#elif defined(__HAL_USB_WAKEUP_EXTI_CLEAR_FLAG) |
| 654 | +__HAL_USB_WAKEUP_EXTI_CLEAR_FLAG(); |
| 655 | +#endif |
| 656 | +} |
575 | 657 |
|
576 | 658 | #endif/* USBHOST */ |