|
| 1 | +/** |
| 2 | + ****************************************************************************** |
| 3 | + * @file stm32wl3x.h |
| 4 | + * @author MCD Application Team |
| 5 | + * @brief CMSIS STM32WL3x Device Peripheral Access Layer Header File. |
| 6 | + * |
| 7 | + * The file is the unique include file that the application programmer |
| 8 | + * is using in the C source code, usually in main.c. This file contains: |
| 9 | + * - Configuration section that allows to select: |
| 10 | + * - The STM32WBxx device used in the target application |
| 11 | + * - To use or not the peripheral's drivers in application code(i.e. |
| 12 | + * code will be based on direct access to peripheral's registers |
| 13 | + * rather than drivers API), this option is controlled by |
| 14 | + * "#define USE_HAL_DRIVER" |
| 15 | + * |
| 16 | + ****************************************************************************** |
| 17 | + * @attention |
| 18 | + * |
| 19 | + * Copyright (c) 2024 STMicroelectronics. |
| 20 | + * All rights reserved. |
| 21 | + * |
| 22 | + * This software is licensed under terms that can be found in the LICENSE file |
| 23 | + * in the root directory of this software component. |
| 24 | + * If no LICENSE file comes with this software, it is provided AS-IS. |
| 25 | + * |
| 26 | + ****************************************************************************** |
| 27 | + */ |
| 28 | + |
| 29 | +/** @addtogroup CMSIS |
| 30 | + * @{ |
| 31 | + */ |
| 32 | + |
| 33 | +/** @addtogroup stm32wl3x |
| 34 | + * @{ |
| 35 | + */ |
| 36 | + |
| 37 | +#ifndefSTM32WL3x_H |
| 38 | +#defineSTM32WL3x_H |
| 39 | + |
| 40 | +#ifdef__cplusplus |
| 41 | +extern"C" { |
| 42 | +#endif/* __cplusplus */ |
| 43 | + |
| 44 | +/** @addtogroup Library_configuration_section |
| 45 | + * @{ |
| 46 | + */ |
| 47 | + |
| 48 | +/** |
| 49 | + * @brief STM32 Family |
| 50 | + */ |
| 51 | +#if !defined (STM32WL3) |
| 52 | +#defineSTM32WL3 |
| 53 | +#endif/* STM32WL3 */ |
| 54 | + |
| 55 | +/** Uncomment the line below according to the target STM32WL3 device used in your application. |
| 56 | + * stm32wl3xx.h file contains: |
| 57 | + * - All the peripheral register's definitions, bits definitions and memory mapping for STM32WL3xx devices |
| 58 | + * - IRQ channel definition |
| 59 | + * - Peripheral memory mapping and physical registers address definition |
| 60 | + * - Peripheral pointer declaration and driver header file inclusion |
| 61 | + * - Product miscellaneous configuration: assert macros, … |
| 62 | + * Note: These CMSIS drivers (stm32wl3xx.h) are always supporting features of the sub-family's superset. |
| 63 | + */ |
| 64 | +#if !defined (STM32WL3XX) |
| 65 | +/* #define STM32WL3XX *//*!< STM32WL30x, STM32WL31x and STM32WL33x Devices */ |
| 66 | +#endif/* STM32WL3XX */ |
| 67 | + |
| 68 | +/* Legacy aliases */ |
| 69 | +#if defined (STM32WL33) |
| 70 | +#defineSTM32WL3XX |
| 71 | +#endif/* STM32WL33 */ |
| 72 | + |
| 73 | + |
| 74 | +/* Tip: To avoid modifying this file each time you need to switch between these |
| 75 | + devices, you can define the device in your toolchain compiler preprocessor. |
| 76 | + */ |
| 77 | +#if !defined (USE_HAL_DRIVER) |
| 78 | +/** |
| 79 | + * @brief Comment the line below if you will not use the peripherals drivers. |
| 80 | + In this case, these drivers will not be included and the application code will |
| 81 | + be based on direct access to peripherals registers |
| 82 | + */ |
| 83 | +/*#define USE_HAL_DRIVER */ |
| 84 | +#endif/* USE_HAL_DRIVER */ |
| 85 | + |
| 86 | +/** |
| 87 | + * @brief CMSIS Device version number |
| 88 | + */ |
| 89 | +#define__STM32WL3x_CMSIS_VERSION_MAIN (0x01U)/*!< [31:24] main version */ |
| 90 | +#define__STM32WL3x_CMSIS_VERSION_SUB1 (0x02U)/*!< [23:16] sub1 version */ |
| 91 | +#define__STM32WL3x_CMSIS_VERSION_SUB2 (0x00U)/*!< [15:8] sub2 version */ |
| 92 | +#define__STM32WL3x_CMSIS_VERSION_RC (0x00U)/*!< [7:0] release candidate */ |
| 93 | +#define__STM32WL3x_CMSIS_VERSION ((__STM32WL3x_CMSIS_VERSION_MAIN << 24U)\ |
| 94 | + |(__STM32WL3x_CMSIS_VERSION_SUB1 << 16U)\ |
| 95 | + |(__STM32WL3x_CMSIS_VERSION_SUB2 << 8U )\ |
| 96 | + |(__STM32WL3x_CMSIS_VERSION_RC)) |
| 97 | + |
| 98 | +/** |
| 99 | + * @} |
| 100 | + */ |
| 101 | + |
| 102 | +/** @addtogroup Device_Included |
| 103 | + * @{ |
| 104 | + */ |
| 105 | + |
| 106 | +#if defined(STM32WL3XX) |
| 107 | +#include"stm32wl3xx.h" |
| 108 | +#else |
| 109 | +#error "Please select first the target STM32WL3xx device used in your application (in stm32wl3x.h file)" |
| 110 | +#endif/* STM32WL3XX */ |
| 111 | + |
| 112 | +/** |
| 113 | + * @} |
| 114 | + */ |
| 115 | + |
| 116 | +/** @addtogroup Exported types |
| 117 | + * @{ |
| 118 | + */ |
| 119 | + |
| 120 | +typedefenum |
| 121 | +{ |
| 122 | +RESET=0, |
| 123 | +SET= !RESET |
| 124 | +}FlagStatus,ITStatus; |
| 125 | + |
| 126 | +typedefenum |
| 127 | +{ |
| 128 | +DISABLE=0, |
| 129 | +ENABLE= !DISABLE |
| 130 | +}FunctionalState; |
| 131 | + |
| 132 | +typedefenum |
| 133 | +{ |
| 134 | +SUCCESS=0, |
| 135 | +ERROR= !SUCCESS |
| 136 | +}ErrorStatus; |
| 137 | + |
| 138 | +typedefuint8_tBOOL; |
| 139 | + |
| 140 | +/** |
| 141 | + * @} |
| 142 | + */ |
| 143 | + |
| 144 | + |
| 145 | +/** @addtogroup Exported_macros |
| 146 | + * @{ |
| 147 | + */ |
| 148 | + |
| 149 | +/**@brief Macro that checks if STATE is a FlagStatus / ITStatus */ |
| 150 | +#defineIS_FLAGSTATUS(STATE) (((STATE) == RESET) || ((STATE) == SET)) |
| 151 | +#defineIS_ITSTATUS(STATE) IS_FLAGSTATUS(STATE) |
| 152 | + |
| 153 | +/** @brief Macro that checks if STATE is a FunctionalState */ |
| 154 | +#defineIS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) |
| 155 | + |
| 156 | +/** @brief Macro that returns a 16-bit value from a buffer where the value is stored in Little Endian Format */ |
| 157 | +#defineLE_TO_HOST_16(ptr) (uint16_t) ( ((uint16_t)*((uint8_t *)(ptr))) | \ |
| 158 | + ((uint16_t)*((uint8_t *)(ptr) + 1) << 8) ) |
| 159 | + |
| 160 | +/** @brief Macro that returns a 16-bit value from a buffer where the value is stored in Big Endian Format */ |
| 161 | +#defineBE_TO_HOST_16(ptr) (uint16_t) ( ((uint16_t) *((uint8_t *)ptr)) << 8 | \ |
| 162 | + ((uint16_t) *((uint8_t *)ptr + 1) ) ) |
| 163 | + |
| 164 | +/** @brief Macro that stores a 16-bit value into a buffer in Little Endian Format (2 bytes) */ |
| 165 | +#defineHOST_TO_LE_16(buf,val) ( ((buf)[0] = (uint8_t) (val) ) , \ |
| 166 | + ((buf)[1] = (uint8_t) ((val)>>8) ) ) |
| 167 | + |
| 168 | +/** @brief Macro that returns a 32-bit value from a buffer where the value is stored in Little Endian Format */ |
| 169 | +#defineLE_TO_HOST_32(ptr) (uint32_t) ( ((uint32_t)*((uint8_t *)(ptr))) | \ |
| 170 | + ((uint32_t)*((uint8_t *)(ptr) + 1) << 8) | \ |
| 171 | + ((uint32_t)*((uint8_t *)(ptr) + 2) << 16) | \ |
| 172 | + ((uint32_t)*((uint8_t *)(ptr) + 3) << 24) ) |
| 173 | + |
| 174 | +/** @brief Macro that returns a 16-bit value from a buffer where the value is stored in Big Endian Format */ |
| 175 | +#defineBE_TO_HOST_32(ptr) (uint32_t) ( ((uint32_t) *((uint8_t *)ptr )) << 24 | \ |
| 176 | + ((uint32_t) *((uint8_t *)ptr + 1)) << 16 | \ |
| 177 | + ((uint32_t) *((uint8_t *)ptr + 2)) << 8 | \ |
| 178 | + ((uint32_t) *((uint8_t *)ptr + 3)) ) |
| 179 | + |
| 180 | +/** @brief Macro that stores a 32-bit value into a buffer in Little Endian Format (4 bytes) */ |
| 181 | +#defineHOST_TO_LE_32(buf,val) ( ((buf)[0] = (uint8_t) (val) ) , \ |
| 182 | + ((buf)[1] = (uint8_t) ((val)>>8) ) , \ |
| 183 | + ((buf)[2] = (uint8_t) ((val)>>16) ) , \ |
| 184 | + ((buf)[3] = (uint8_t) ((val)>>24) ) ) |
| 185 | + |
| 186 | +/** @brief Macro that returns a 64-bit value from a buffer where the value is stored in Little Endian Format */ |
| 187 | +#defineLE_TO_HOST_64(ptr) (uint64_t) ( ((uint64_t)*((uint8_t *)(ptr))) | \ |
| 188 | + ((uint64_t)*((uint8_t *)(ptr) + 1) << 8) | \ |
| 189 | + ((uint64_t)*((uint8_t *)(ptr) + 2) << 16) | \ |
| 190 | + ((uint64_t)*((uint8_t *)(ptr) + 3) << 24) | \ |
| 191 | + ((uint64_t)*((uint8_t *)(ptr) + 4) << 32) | \ |
| 192 | + ((uint64_t)*((uint8_t *)(ptr) + 5) << 40) | \ |
| 193 | + ((uint64_t)*((uint8_t *)(ptr) + 6) << 48) | \ |
| 194 | + ((uint64_t)*((uint8_t *)(ptr) + 7) << 56) ) |
| 195 | + |
| 196 | +/** @brief Macro that stores a 64-bit value into a buffer in Little Endian Format (8 bytes) */ |
| 197 | +#defineHOST_TO_LE_64(buf,val) ( ((buf)[0] = (uint8_t) (val) ) , \ |
| 198 | + ((buf)[1] = (uint8_t) ((val)>>8) ) , \ |
| 199 | + ((buf)[2] = (uint8_t) ((val)>>16) ) , \ |
| 200 | + ((buf)[3] = (uint8_t) ((val)>>24) ) , \ |
| 201 | + ((buf)[4] = (uint8_t) ((val)>>32) ) , \ |
| 202 | + ((buf)[5] = (uint8_t) ((val)>>40) ) , \ |
| 203 | + ((buf)[6] = (uint8_t) ((val)>>48) ) , \ |
| 204 | + ((buf)[7] = (uint8_t) ((val)>>56) ) ) |
| 205 | + |
| 206 | +#defineSET_BIT(REG,BIT) ((REG) |= (BIT)) |
| 207 | + |
| 208 | +#defineCLEAR_BIT(REG,BIT) ((REG) &= ~(BIT)) |
| 209 | + |
| 210 | +#defineREAD_BIT(REG,BIT) ((REG) & (BIT)) |
| 211 | + |
| 212 | +#defineCLEAR_REG(REG) ((REG) = (0x0)) |
| 213 | + |
| 214 | +#defineWRITE_REG(REG,VAL) ((REG) = (VAL)) |
| 215 | + |
| 216 | +#defineREAD_REG(REG) (REG) |
| 217 | + |
| 218 | +#defineTOGGLE_BIT(REG,BIT) ((REG) ^= (BIT)) |
| 219 | + |
| 220 | +#defineMODIFY_REG(REG,CLEARMASK,SETMASK) WRITE_REG((REG), ((READ_REG(REG) & (~(CLEARMASK))) | (SETMASK))) |
| 221 | + |
| 222 | +#defineMODIFY_REG_FIELD(REG,FIELD_NAME,VAL) MODIFY_REG(REG, FIELD_NAME##_Msk, ((VAL)<<(FIELD_NAME##_Pos))&(FIELD_NAME##_Msk)) |
| 223 | + |
| 224 | +#defineREAD_REG_FIELD(REG,FIELD)((REG & FIELD)>>FIELD##_Pos) |
| 225 | + |
| 226 | +#definePOSITION_VAL(VAL) (__CLZ(__RBIT(VAL))) |
| 227 | + |
| 228 | +/* Use of interrupt control for register exclusive access (privileged mode only) */ |
| 229 | +/* Atomic 32-bit register access macro to set one or several bits */ |
| 230 | +#defineATOMIC_SET_BIT(REG,BIT) \ |
| 231 | + do { \ |
| 232 | + uint32_t primask; \ |
| 233 | + primask = __get_PRIMASK(); \ |
| 234 | + __set_PRIMASK(1); \ |
| 235 | + SET_BIT((REG), (BIT)); \ |
| 236 | + __set_PRIMASK(primask); \ |
| 237 | + } while(0) |
| 238 | + |
| 239 | +/* Atomic 32-bit register access macro to clear one or several bits */ |
| 240 | +#defineATOMIC_CLEAR_BIT(REG,BIT) \ |
| 241 | + do { \ |
| 242 | + uint32_t primask; \ |
| 243 | + primask = __get_PRIMASK(); \ |
| 244 | + __set_PRIMASK(1); \ |
| 245 | + CLEAR_BIT((REG), (BIT)); \ |
| 246 | + __set_PRIMASK(primask); \ |
| 247 | + } while(0) |
| 248 | + |
| 249 | +/* Atomic 32-bit register access macro to clear and set one or several bits */ |
| 250 | +#defineATOMIC_MODIFY_REG(REG,CLEARMSK,SETMASK) \ |
| 251 | + do { \ |
| 252 | + uint32_t primask; \ |
| 253 | + primask = __get_PRIMASK(); \ |
| 254 | + __set_PRIMASK(1); \ |
| 255 | + MODIFY_REG((REG), (CLEARMSK), (SETMASK)); \ |
| 256 | + __set_PRIMASK(primask); \ |
| 257 | + } while(0) |
| 258 | + |
| 259 | +/* Atomic 16-bit register access macro to set one or several bits */ |
| 260 | +#defineATOMIC_SETH_BIT(REG,BIT) ATOMIC_SET_BIT(REG, BIT) |
| 261 | + |
| 262 | +/* Atomic 16-bit register access macro to clear one or several bits */ |
| 263 | +#defineATOMIC_CLEARH_BIT(REG,BIT) ATOMIC_CLEAR_BIT(REG, BIT) |
| 264 | + |
| 265 | +/* Atomic 16-bit register access macro to clear and set one or several bits */ |
| 266 | +#defineATOMIC_MODIFYH_REG(REG,CLEARMSK,SETMASK) ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) |
| 267 | + |
| 268 | +/** |
| 269 | + * @} |
| 270 | + */ |
| 271 | + |
| 272 | +/**@brief TRUE, FALSE definition */ |
| 273 | +#ifndefTRUE |
| 274 | +#defineTRUE ((BOOL)1U) |
| 275 | +#endif |
| 276 | +#ifndefFALSE |
| 277 | +#defineFALSE ((BOOL)0U) |
| 278 | +#endif |
| 279 | + |
| 280 | +#if defined (USE_HAL_DRIVER) |
| 281 | +#include"stm32wl3x_hal.h" |
| 282 | +#endif/* USE_HAL_DRIVER */ |
| 283 | + |
| 284 | +#ifdef__cplusplus |
| 285 | +} |
| 286 | +#endif/* __cplusplus */ |
| 287 | + |
| 288 | +#endif/* STM32WL3x_H */ |
| 289 | +/** |
| 290 | + * @} |
| 291 | + */ |
| 292 | + |
| 293 | +/** |
| 294 | + * @} |
| 295 | + */ |