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Commit345138a

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variants(wb): add generic WB55V(C-E-G) and WB55VYY
Fixes#2653.Signed-off-by: Frederic Pillon <frederic.pillon@st.com>
1 parentece7b0b commit345138a

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4 files changed

+331
-2
lines changed

4 files changed

+331
-2
lines changed

‎README.md‎

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Original file line numberDiff line numberDiff line change
@@ -769,6 +769,8 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
769769
|:green_heart:| STM32WB55CC<br>STM32WB55CE<br>STM32WB55CG| Generic Board|*2.0.0*||
770770
|:green_heart:| STM32WB5MMG| Generic Board|*2.1.0*||
771771
|:green_heart:| STM32WB55RC<br>STM32WB55RE<br>STM32WB55RG| Generic Board|*2.0.0*||
772+
|:yellow_heart:| STM32WB55VC<br>STM32WB55VE<br>STM32WB55VG| Generic Board|**2.10.0**||
773+
|:yellow_heart:| STM32WB55VY| Generic Board|**2.10.0**||
772774

773775
###Generic STM32WBA boards
774776

‎boards.txt‎

Lines changed: 64 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12622,6 +12622,70 @@ GenWB.menu.pnum.GENERIC_WB55RGVX.build.product_line=STM32WB55xx
1262212622
GenWB.menu.pnum.GENERIC_WB55RGVX.build.variant=STM32WBxx/WB55R(C-E-G)V
1262312623
GenWB.menu.pnum.GENERIC_WB55RGVX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
1262412624

12625+
# Generic WB55VCQx
12626+
GenWB.menu.pnum.GENERIC_WB55VCQX=Generic WB55VCQx
12627+
GenWB.menu.pnum.GENERIC_WB55VCQX.upload.maximum_size=131072
12628+
GenWB.menu.pnum.GENERIC_WB55VCQX.upload.maximum_data_size=65536
12629+
GenWB.menu.pnum.GENERIC_WB55VCQX.build.board=GENERIC_WB55VCQX
12630+
GenWB.menu.pnum.GENERIC_WB55VCQX.build.product_line=STM32WB55xx
12631+
GenWB.menu.pnum.GENERIC_WB55VCQX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
12632+
GenWB.menu.pnum.GENERIC_WB55VCQX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
12633+
12634+
# Generic WB55VCYx
12635+
GenWB.menu.pnum.GENERIC_WB55VCYX=Generic WB55VCYx
12636+
GenWB.menu.pnum.GENERIC_WB55VCYX.upload.maximum_size=131072
12637+
GenWB.menu.pnum.GENERIC_WB55VCYX.upload.maximum_data_size=65536
12638+
GenWB.menu.pnum.GENERIC_WB55VCYX.build.board=GENERIC_WB55VCYX
12639+
GenWB.menu.pnum.GENERIC_WB55VCYX.build.product_line=STM32WB55xx
12640+
GenWB.menu.pnum.GENERIC_WB55VCYX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
12641+
GenWB.menu.pnum.GENERIC_WB55VCYX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
12642+
12643+
# Generic WB55VEQx
12644+
GenWB.menu.pnum.GENERIC_WB55VEQX=Generic WB55VEQx
12645+
GenWB.menu.pnum.GENERIC_WB55VEQX.upload.maximum_size=262144
12646+
GenWB.menu.pnum.GENERIC_WB55VEQX.upload.maximum_data_size=65536
12647+
GenWB.menu.pnum.GENERIC_WB55VEQX.build.board=GENERIC_WB55VEQX
12648+
GenWB.menu.pnum.GENERIC_WB55VEQX.build.product_line=STM32WB55xx
12649+
GenWB.menu.pnum.GENERIC_WB55VEQX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
12650+
GenWB.menu.pnum.GENERIC_WB55VEQX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
12651+
12652+
# Generic WB55VEYx
12653+
GenWB.menu.pnum.GENERIC_WB55VEYX=Generic WB55VEYx
12654+
GenWB.menu.pnum.GENERIC_WB55VEYX.upload.maximum_size=262144
12655+
GenWB.menu.pnum.GENERIC_WB55VEYX.upload.maximum_data_size=196608
12656+
GenWB.menu.pnum.GENERIC_WB55VEYX.build.board=GENERIC_WB55VEYX
12657+
GenWB.menu.pnum.GENERIC_WB55VEYX.build.product_line=STM32WB55xx
12658+
GenWB.menu.pnum.GENERIC_WB55VEYX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
12659+
GenWB.menu.pnum.GENERIC_WB55VEYX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
12660+
12661+
# Generic WB55VGQx
12662+
GenWB.menu.pnum.GENERIC_WB55VGQX=Generic WB55VGQx
12663+
GenWB.menu.pnum.GENERIC_WB55VGQX.upload.maximum_size=524288
12664+
GenWB.menu.pnum.GENERIC_WB55VGQX.upload.maximum_data_size=65536
12665+
GenWB.menu.pnum.GENERIC_WB55VGQX.build.board=GENERIC_WB55VGQX
12666+
GenWB.menu.pnum.GENERIC_WB55VGQX.build.product_line=STM32WB55xx
12667+
GenWB.menu.pnum.GENERIC_WB55VGQX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
12668+
GenWB.menu.pnum.GENERIC_WB55VGQX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
12669+
12670+
# Generic WB55VGYx
12671+
GenWB.menu.pnum.GENERIC_WB55VGYX=Generic WB55VGYx
12672+
GenWB.menu.pnum.GENERIC_WB55VGYX.upload.maximum_size=524288
12673+
GenWB.menu.pnum.GENERIC_WB55VGYX.upload.maximum_data_size=196608
12674+
GenWB.menu.pnum.GENERIC_WB55VGYX.build.board=GENERIC_WB55VGYX
12675+
GenWB.menu.pnum.GENERIC_WB55VGYX.build.product_line=STM32WB55xx
12676+
GenWB.menu.pnum.GENERIC_WB55VGYX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
12677+
GenWB.menu.pnum.GENERIC_WB55VGYX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
12678+
12679+
# Generic WB55VYYx
12680+
GenWB.menu.pnum.GENERIC_WB55VYYX=Generic WB55VYYx
12681+
GenWB.menu.pnum.GENERIC_WB55VYYX.upload.maximum_size=327680
12682+
GenWB.menu.pnum.GENERIC_WB55VYYX.upload.maximum_data_size=196608
12683+
GenWB.menu.pnum.GENERIC_WB55VYYX.build.board=GENERIC_WB55VYYX
12684+
GenWB.menu.pnum.GENERIC_WB55VYYX.build.product_line=STM32WB55xx
12685+
GenWB.menu.pnum.GENERIC_WB55VYYX.build.variant=STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY
12686+
GenWB.menu.pnum.GENERIC_WB55VYYX.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WBxx/STM32WB55_CM4.svd
12687+
12688+
1262512689
# Upload menu
1262612690
GenWB.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
1262712691
GenWB.menu.upload_method.swdMethod.upload.protocol=swd

‎variants/STM32WBxx/WB55V(C-E-G)(Q-Y)_WB55VYY/generic_clock.c‎

Lines changed: 80 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,7 @@
1515
defined(ARDUINO_GENERIC_WB55VGQX)|| defined(ARDUINO_GENERIC_WB55VGYX)||\
1616
defined(ARDUINO_GENERIC_WB55VYYX)
1717
#include"pins_arduino.h"
18+
#include"lock_resource.h"
1819

1920
/**
2021
* @brief System Clock Configuration
@@ -23,8 +24,85 @@
2324
*/
2425
WEAKvoidSystemClock_Config(void)
2526
{
26-
/* SystemClock_Config can be generated by STM32CubeMX */
27-
#warning "SystemClock_Config() is empty. Default clock at reset is used."
27+
RCC_OscInitTypeDefRCC_OscInitStruct= {};
28+
RCC_ClkInitTypeDefRCC_ClkInitStruct= {};
29+
RCC_PeriphCLKInitTypeDefPeriphClkInitStruct= {0};
30+
31+
/* This prevents concurrent access to RCC registers by CPU2 (M0+) */
32+
hsem_lock(CFG_HW_RCC_SEMID,HSEM_LOCK_DEFAULT_RETRY);
33+
34+
/** Configure the main internal regulator output voltage
35+
*/
36+
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
37+
38+
/* This prevents the CPU2 (M0+) to disable the HSI48 oscillator */
39+
hsem_lock(CFG_HW_CLK48_CONFIG_SEMID,HSEM_LOCK_DEFAULT_RETRY);
40+
41+
/** Initializes the RCC Oscillators according to the specified parameters
42+
* in the RCC_OscInitTypeDef structure.
43+
*/
44+
RCC_OscInitStruct.OscillatorType=RCC_OSCILLATORTYPE_HSI48 |RCC_OSCILLATORTYPE_HSI
45+
|RCC_OSCILLATORTYPE_MSI;
46+
RCC_OscInitStruct.HSIState=RCC_HSI_ON;
47+
RCC_OscInitStruct.MSIState=RCC_MSI_ON;
48+
RCC_OscInitStruct.HSI48State=RCC_HSI48_ON;
49+
RCC_OscInitStruct.HSICalibrationValue=RCC_HSICALIBRATION_DEFAULT;
50+
RCC_OscInitStruct.MSICalibrationValue=RCC_MSICALIBRATION_DEFAULT;
51+
RCC_OscInitStruct.MSIClockRange=RCC_MSIRANGE_6;
52+
RCC_OscInitStruct.PLL.PLLState=RCC_PLL_ON;
53+
RCC_OscInitStruct.PLL.PLLSource=RCC_PLLSOURCE_MSI;
54+
RCC_OscInitStruct.PLL.PLLM=RCC_PLLM_DIV1;
55+
RCC_OscInitStruct.PLL.PLLN=32;
56+
RCC_OscInitStruct.PLL.PLLP=RCC_PLLP_DIV2;
57+
RCC_OscInitStruct.PLL.PLLR=RCC_PLLR_DIV2;
58+
RCC_OscInitStruct.PLL.PLLQ=RCC_PLLQ_DIV2;
59+
if (HAL_RCC_OscConfig(&RCC_OscInitStruct)!=HAL_OK) {
60+
Error_Handler();
61+
}
62+
63+
/** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
64+
*/
65+
RCC_ClkInitStruct.ClockType=RCC_CLOCKTYPE_HCLK4 |RCC_CLOCKTYPE_HCLK2
66+
|RCC_CLOCKTYPE_HCLK |RCC_CLOCKTYPE_SYSCLK
67+
|RCC_CLOCKTYPE_PCLK1 |RCC_CLOCKTYPE_PCLK2;
68+
RCC_ClkInitStruct.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK;
69+
RCC_ClkInitStruct.AHBCLKDivider=RCC_SYSCLK_DIV1;
70+
RCC_ClkInitStruct.APB1CLKDivider=RCC_HCLK_DIV1;
71+
RCC_ClkInitStruct.APB2CLKDivider=RCC_HCLK_DIV1;
72+
RCC_ClkInitStruct.AHBCLK2Divider=RCC_SYSCLK_DIV2;
73+
RCC_ClkInitStruct.AHBCLK4Divider=RCC_SYSCLK_DIV1;
74+
75+
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct,FLASH_LATENCY_3)!=HAL_OK) {
76+
Error_Handler();
77+
}
78+
79+
/** Initializes the peripherals clock
80+
*/
81+
PeriphClkInitStruct.PeriphClockSelection=RCC_PERIPHCLK_ADC |RCC_PERIPHCLK_LPUART1
82+
|RCC_PERIPHCLK_SMPS |RCC_PERIPHCLK_USB;
83+
PeriphClkInitStruct.PLLSAI1.PLLN=82;
84+
PeriphClkInitStruct.PLLSAI1.PLLP=RCC_PLLP_DIV8;
85+
PeriphClkInitStruct.PLLSAI1.PLLQ=RCC_PLLQ_DIV2;
86+
PeriphClkInitStruct.PLLSAI1.PLLR=RCC_PLLR_DIV8;
87+
PeriphClkInitStruct.PLLSAI1.PLLSAI1ClockOut=RCC_PLLSAI1_ADCCLK;
88+
PeriphClkInitStruct.AdcClockSelection=RCC_ADCCLKSOURCE_PLLSAI1;
89+
PeriphClkInitStruct.Lpuart1ClockSelection=RCC_LPUART1CLKSOURCE_HSI;
90+
PeriphClkInitStruct.SmpsClockSelection=RCC_SMPSCLKSOURCE_HSI;
91+
PeriphClkInitStruct.SmpsDivSelection=RCC_SMPSCLKDIV_RANGE1;
92+
PeriphClkInitStruct.UsbClockSelection=RCC_USBCLKSOURCE_HSI48;
93+
94+
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct)!=HAL_OK) {
95+
Error_Handler();
96+
}
97+
98+
LL_PWR_SMPS_SetStartupCurrent(LL_PWR_SMPS_STARTUP_CURRENT_80MA);
99+
LL_PWR_SMPS_SetOutputVoltageLevel(LL_PWR_SMPS_OUTPUT_VOLTAGE_1V40);
100+
LL_PWR_SMPS_Enable();
101+
102+
/* Select HSI as system clock source after Wake Up from Stop mode */
103+
LL_RCC_SetClkAfterWakeFromStop(LL_RCC_STOP_WAKEUPCLOCK_HSI);
104+
105+
hsem_unlock(CFG_HW_RCC_SEMID);
28106
}
29107

30108
#endif/* ARDUINO_GENERIC_* */
Lines changed: 185 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,185 @@
1+
/*
2+
******************************************************************************
3+
**
4+
** File : LinkerScript.ld
5+
**
6+
** Author : STM32CubeIDE
7+
**
8+
** Abstract : Linker script for STM32WB55xG Device
9+
** 1024Kbytes FLASH
10+
** 256Kbytes RAM
11+
**
12+
** Set heap size, stack size and stack location according
13+
** to application requirements.
14+
**
15+
** Set memory bank area and size if external memory is used.
16+
**
17+
** Target : STMicroelectronics STM32
18+
**
19+
** Distribution: The file is distributed as is without any warranty
20+
** of any kind.
21+
**
22+
*****************************************************************************
23+
** @attention
24+
**
25+
** Copyright (c) 2024 STMicroelectronics.
26+
** All rights reserved.
27+
**
28+
** This software is licensed under terms that can be found in the LICENSE file
29+
** in the root directory of this software component.
30+
** If no LICENSE file comes with this software, it is provided AS-IS.
31+
**
32+
*****************************************************************************
33+
*/
34+
35+
/* Entry Point*/
36+
ENTRY(Reset_Handler)
37+
38+
/* Highest address of the user mode stack*/
39+
_estack = ORIGIN(RAM) + LENGTH(RAM);/* end of RAM*/
40+
/* Generate a link error if heap and stack don't fit into RAM*/
41+
_Min_Heap_Size =0x200;/* required amount of heap*/
42+
_Min_Stack_Size =0x400;/* required amount of stack*/
43+
44+
/* Specify the memory areas*/
45+
MEMORY
46+
{
47+
FLASH (rx) :ORIGIN =0x08000000 + LD_FLASH_OFFSET,LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
48+
RAM (xrw) :ORIGIN =0x20000008,LENGTH = LD_MAX_DATA_SIZE -8
49+
RAM_SHARED (xrw) :ORIGIN =0x20030000,LENGTH = 10K
50+
}
51+
52+
/* Define output sections*/
53+
SECTIONS
54+
{
55+
/* The startup code goes first into FLASH*/
56+
.isr_vector :
57+
{
58+
. =ALIGN(4);
59+
KEEP(*(.isr_vector))/* Startup code*/
60+
. =ALIGN(4);
61+
} >FLASH
62+
63+
/* The program code and other data goes into FLASH*/
64+
.text :
65+
{
66+
. =ALIGN(4);
67+
*(.text)/* .text sections (code)*/
68+
*(.text*)/* .text* sections (code)*/
69+
*(.glue_7)/* glue arm to thumb code*/
70+
*(.glue_7t)/* glue thumb to arm code*/
71+
*(.eh_frame)
72+
73+
KEEP (*(.init))
74+
KEEP (*(.fini))
75+
76+
. =ALIGN(4);
77+
_etext = .;/* define a global symbols at end of code*/
78+
} >FLASH
79+
80+
/* Constant data goes into FLASH*/
81+
.rodata :
82+
{
83+
. =ALIGN(4);
84+
*(.rodata)/* .rodata sections (constants, strings, etc.)*/
85+
*(.rodata*)/* .rodata* sections (constants, strings, etc.)*/
86+
. =ALIGN(4);
87+
} >FLASH
88+
89+
.ARM.extab (READONLY) :/* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier.*/
90+
{
91+
*(.ARM.extab* .gnu.linkonce.armextab.*)
92+
} >FLASH
93+
.ARM (READONLY) :/* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier.*/
94+
{
95+
__exidx_start = .;
96+
*(.ARM.exidx*)
97+
__exidx_end = .;
98+
} >FLASH
99+
100+
.preinit_array (READONLY) :/* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier.*/
101+
{
102+
PROVIDE_HIDDEN (__preinit_array_start = .);
103+
KEEP (*(.preinit_array*))
104+
PROVIDE_HIDDEN (__preinit_array_end = .);
105+
} >FLASH
106+
.init_array (READONLY) :/* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier.*/
107+
{
108+
PROVIDE_HIDDEN (__init_array_start = .);
109+
KEEP (*(SORT(.init_array.*)))
110+
KEEP (*(.init_array*))
111+
PROVIDE_HIDDEN (__init_array_end = .);
112+
} >FLASH
113+
.fini_array (READONLY) :/* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier.*/
114+
{
115+
PROVIDE_HIDDEN (__fini_array_start = .);
116+
KEEP (*(SORT(.fini_array.*)))
117+
KEEP (*(.fini_array*))
118+
PROVIDE_HIDDEN (__fini_array_end = .);
119+
} >FLASH
120+
121+
/* used by the startup to initialize data*/
122+
_sidata =LOADADDR(.data);
123+
124+
/* Initialized data sections goes into RAM, load LMA copy after code*/
125+
.data :
126+
{
127+
. =ALIGN(4);
128+
_sdata = .;/* create a global symbol at data start*/
129+
*(.data)/* .data sections*/
130+
*(.data*)/* .data* sections*/
131+
*(.RamFunc)/* .RamFunc sections*/
132+
*(.RamFunc*)/* .RamFunc* sections*/
133+
134+
. =ALIGN(4);
135+
_edata = .;/* define a global symbol at data end*/
136+
} >RAM AT> FLASH
137+
138+
/* Uninitialized data section*/
139+
. =ALIGN(4);
140+
.bss :
141+
{
142+
/* This is used by the startup in order to initialize the .bss section*/
143+
_sbss = .;/* define a global symbol at bss start*/
144+
__bss_start__ = _sbss;
145+
*(.bss)
146+
*(.bss*)
147+
*(COMMON)
148+
149+
. =ALIGN(4);
150+
_ebss = .;/* define a global symbol at bss end*/
151+
__bss_end__ = _ebss;
152+
} >RAM
153+
154+
/* User_heap_stack section, used to check that there is enough RAM left*/
155+
._user_heap_stack :
156+
{
157+
. =ALIGN(8);
158+
PROVIDE ( end = . );
159+
PROVIDE ( _end = . );
160+
. = . + _Min_Heap_Size;
161+
. = . + _Min_Stack_Size;
162+
. =ALIGN(8);
163+
} >RAM
164+
165+
/* Remove information from the standard libraries*/
166+
/DISCARD/ :
167+
{
168+
libc.a ( * )
169+
libm.a ( * )
170+
libgcc.a ( * )
171+
}
172+
173+
.ARM.attributes 0 : { *(.ARM.attributes) }
174+
MAPPING_TABLE (NOLOAD) : { *(MAPPING_TABLE) } >RAM_SHARED
175+
MB_MEM1 (NOLOAD) : { *(MB_MEM1) } >RAM_SHARED
176+
177+
/* used by the startup to initialize .MB_MEM2 data*/
178+
_siMB_MEM2 =LOADADDR(.MB_MEM2);
179+
.MB_MEM2 :
180+
{
181+
_sMB_MEM2 = . ;
182+
*(MB_MEM2) ;
183+
_eMB_MEM2 = . ;
184+
} >RAM_SHARED AT> FLASH
185+
}

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