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Commitf5b3f43

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cristiccwsakernel
authored andcommitted
i2c: owl: Clear NACK and BUS error bits
When the NACK and BUS error bits are set by the hardware, the driver isresponsible for clearing them by writing "1" into the correspondingstatus registers.Hence perform the necessary operations in owl_i2c_interrupt().Fixes:d211e62 ("i2c: Add Actions Semiconductor Owl family S900 I2C driver")Reported-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>Signed-off-by: Wolfram Sang <wsa@kernel.org>
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‎drivers/i2c/busses/i2c-owl.c‎

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Original file line numberDiff line numberDiff line change
@@ -176,13 +176,19 @@ static irqreturn_t owl_i2c_interrupt(int irq, void *_dev)
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fifostat=readl(i2c_dev->base+OWL_I2C_REG_FIFOSTAT);
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if (fifostat&OWL_I2C_FIFOSTAT_RNB) {
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i2c_dev->err=-ENXIO;
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/* Clear NACK error bit by writing "1" */
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owl_i2c_update_reg(i2c_dev->base+OWL_I2C_REG_FIFOSTAT,
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OWL_I2C_FIFOSTAT_RNB, true);
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gotostop;
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}
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/* Handle bus error */
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stat=readl(i2c_dev->base+OWL_I2C_REG_STAT);
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if (stat&OWL_I2C_STAT_BEB) {
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i2c_dev->err=-EIO;
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/* Clear BUS error bit by writing "1" */
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owl_i2c_update_reg(i2c_dev->base+OWL_I2C_REG_STAT,
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OWL_I2C_STAT_BEB, true);
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gotostop;
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}
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