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Commit29ac40c

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nivedita76suryasaimadhu
authored andcommitted
x86/mm/mem_encrypt: Fix definition of PMD_FLAGS_DEC_WP
The PAT bit is in different locations for 4k and 2M/1G page tableentries.Add a definition for _PAGE_LARGE_CACHE_MASK to represent the threecaching bits (PWT, PCD, PAT), similar to _PAGE_CACHE_MASK for 4k pages,and use it in the definition of PMD_FLAGS_DEC_WP to get the correct PATindex for write-protected pages.Fixes:6ebcb06 ("x86/mm: Add support to encrypt the kernel in-place")Signed-off-by: Arvind Sankar <nivedita@alum.mit.edu>Signed-off-by: Borislav Petkov <bp@suse.de>Tested-by: Tom Lendacky <thomas.lendacky@amd.com>Cc: stable@vger.kernel.orgLink:https://lkml.kernel.org/r/20201111160946.147341-1-nivedita@alum.mit.edu
1 parente45cdc7 commit29ac40c

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‎arch/x86/include/asm/pgtable_types.h‎

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@@ -155,6 +155,7 @@ enum page_cache_mode {
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#define_PAGE_ENC(_AT(pteval_t, sme_me_mask))
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#define_PAGE_CACHE_MASK(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)
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#define_PAGE_LARGE_CACHE_MASK(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT_LARGE)
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#define_PAGE_NOCACHE(cachemode2protval(_PAGE_CACHE_MODE_UC))
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#define_PAGE_CACHE_WP(cachemode2protval(_PAGE_CACHE_MODE_WP))

‎arch/x86/mm/mem_encrypt_identity.c‎

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Original file line numberDiff line numberDiff line change
@@ -45,8 +45,8 @@
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#definePMD_FLAGS_LARGE(__PAGE_KERNEL_LARGE_EXEC & ~_PAGE_GLOBAL)
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#definePMD_FLAGS_DECPMD_FLAGS_LARGE
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#definePMD_FLAGS_DEC_WP((PMD_FLAGS_DEC & ~_PAGE_CACHE_MASK) | \
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(_PAGE_PAT | _PAGE_PWT))
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#definePMD_FLAGS_DEC_WP((PMD_FLAGS_DEC & ~_PAGE_LARGE_CACHE_MASK) | \
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(_PAGE_PAT_LARGE | _PAGE_PWT))
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#definePMD_FLAGS_ENC(PMD_FLAGS_LARGE | _PAGE_ENC)
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