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Commit3b4a921

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Merge pull request#108 from ThomasWaldmann/typos-grammar
fix typos and grammar
2 parentsd11afd1 +885103b commit3b4a921

33 files changed

+132
-133
lines changed

‎.github/workflows/publish.yml‎

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@@ -8,11 +8,11 @@
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name:Publish Python Package
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on:
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#trigger when publishing a release
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#Trigger when publishing a release.
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release:
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types:[published]
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#also allow triggering this workflow manually for testing
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#Also allow triggering this workflow manually for testing.
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workflow_dispatch:
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jobs:
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-name:Checkout
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uses:actions/checkout@v3
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with:
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#just fetching 1 commit is not enough for setuptools-scm, so we fetch all
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#Fetching a single commit is not enough for setuptools-scm, so we fetch all commits.
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fetch-depth:0
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-name:Set up Python
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uses:actions/setup-python@v2
@@ -36,7 +36,7 @@ jobs:
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-name:Build package
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run:|
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python setup.py sdist
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rm dist/*.orig #clean sdist_upip noise
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rm dist/*.orig #Remove sdist_upip noise.
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-name:Publish to Test PyPI
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uses:pypa/gh-action-pypi-publish@release/v1
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with:

‎.github/workflows/run_tests.yaml‎

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@@ -32,7 +32,7 @@ jobs:
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-name:Build MicroPython
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id:build_micropython
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run:|
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echo "Buildingmicropython"
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echo "BuildingMicroPython"
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git clone --depth 1 https://github.com/micropython/micropython.git
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pushd micropython/mpy-cross
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make
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-name:Fetch binutils-esp32ulp
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id:fetch_binutils
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run:|
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echo "Fetching URL ofpre-built esp32ulp-elf binaries"
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## URL topre-built binaries is published inesp-idf
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echo "Fetching URL ofprebuilt esp32ulp-elf binaries"
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##TheURL toprebuilt binaries is published inESP-IDF
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IDFVER=v5.0.1
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curl -s \
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-o tools.json \

‎AUTHORS‎

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E-mail addresses listed here are not intended for support.
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Email addresses listed here are not intended for support requests.
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micropython-esp32-ulp authors
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-----------------------------

‎CHANGES‎

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ChangeLog
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=========
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Change log
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==========
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1.2.0,release 2022-03-26
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1.2.0,released 2022-03-26
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-project moved tomicropythonorganization
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-project renamed from py-esp32-ulp to micropython-esp32-ulp
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- (no functional changes)
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-Project moved tothe MicroPythonorganization.
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-Project renamed from py-esp32-ulp to micropython-esp32-ulp.
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- (No functional changes.)
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1.1.0, released 2021-12-03
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1.1.0, release 2021-12-03
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- first pypi release
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- First PyPI release.
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‎README.rst‎

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@@ -15,7 +15,7 @@ micropython-esp32-ulp is an assembler toolchain for the ESP32 ULP (Ultra Low-Pow
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Co-Processor, written in MicroPython.
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It can translate small assembly language programs to a loadable/executable
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ULP-FSM (not RISC-V) machine code binary, directly ona ESP32 microcontroller.
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ULP-FSM (not RISC-V) machine code binary, directly onan ESP32 microcontroller.
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This is intended as an alternative approach to assembling such programs using
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the `binutils-gdb toolchain<https://github.com/espressif/binutils-gdb/tree/esp32ulp-elf-2.35>`_
@@ -39,26 +39,26 @@ The following features are supported:
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* many ESP32 ULP code examples found on the web will work unmodified
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* a simple disassembler is also provided
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.. [#f1]Note: the ESP32-S2 and ESP32-S3 have the same ULP binary format between each other
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but the binary format is differentthan that of the original ESP32 ULP. You need to
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select the ``esp32s2``cpu (`see docs</docs/index.rst>`_) when assembling code for
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.. [#f1]Note: the ESP32-S2 and ESP32-S3 have the same ULP binary format,
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but the binary format is differentfrom that of the original ESP32 ULP. You need to
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select the ``esp32s2``CPU (`see docs</docs/index.rst>`_) when assembling code for
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use on an ESP32-S2/S3.
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.. [#f2]Note: The ESP32-S2 and ESP32-S3 have the same ULP binary format, but the peripheral
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register addresses (those accessed with REG_RD and REG_WR) are different. For best
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results, use the correct peripheral register addresses for the specific variant you
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are working with. The assembler (when used with ``cpu=esp32s2``) will accept
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addresses for any of the 3 variants, because they are translated into relative
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offsets anyway and many registers live at the same relative offset on all 3 variants.
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This conveniently means that the same assembly code can assembled unmodified for each
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offsets anyway, and many registers live at the same relative offset on all 3 variants.
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This conveniently means that the same assembly code canbeassembled unmodified for each
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variant and produce a correctly working binary - as long as only peripheral registers
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are used, which have the same relative offset across the variants. Use with care!
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Quick start
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-----------
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To get going run the following directly on the ESP32:
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To get going, run the following directly on the ESP32:
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..code-block::python
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@@ -77,7 +77,7 @@ To get going run the following directly on the ESP32:
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import counter
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The `examples/counter.py</examples/counter.py>`_ example shows how to assemble code,
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load and run the resulting binary and exchange data between the ULP and the main CPU.
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load and run the resulting binary, and exchange data between the ULP and the main CPU.
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Documentation
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Requirements
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------------
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The minimum supported version of MicroPython is v1.12. (For ESP32-S2 and S3
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devices, a version greater than v1.20 is required as versionsbefore that
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did notenable the ``esp32.ULP`` class).
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The minimum supported version of MicroPython is v1.12. (For ESP32-S2 andESP32-S3
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devices, a version greater than v1.20 is required, asearlierversionsdid not
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enable the ``esp32.ULP`` class).
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An ESP32 device is required to run the ULP machine code binary produced by
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micropython-esp32-ulp.

‎demo.S‎

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@@ -27,7 +27,7 @@ textstart: ld r0, r1, 0 # a comment!
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rsh r0, r1,42
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move r0, r1
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move r0,42
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move r0, textstart#moves abs addr of textstart to r0
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move r0, textstart#Move the absolute address of textstart to r0
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move r0, constant42
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stage_rst
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stage_inc42
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data2:.skip4
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dataw:.word1,2,3,4
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datal:.long1,2,3,4
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datab:.byte1,2,3#test alignment/ fill upof section
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datab:.byte1,2,3#Test alignmentand fill upthe section
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dataend:
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.bss
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bss0:.skip4
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bss1:.skip2#test alignment/ fill upof section
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bss1:.skip2#Test alignmentand fill upthe section
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bssend:

‎docs/disassembler.rst‎

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The simplest and default mode of the disassembler is to disassemble the
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specified file.
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Note that the ULP header isvalidates and files with unknown magic bytes will be
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Note that the ULP header isvalidated and files with unknown magic bytes will be
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rejected. The correct 4 magic bytes at the start of a ULP binary are ``ulp\x00``.
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Example disassembling an ESP32 ULP binary:
@@ -75,13 +75,13 @@ Example disassembling an ESP32-S2 ULP binary:
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Disassembling a byte sequence
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-----------------------------
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The ``-m`` option allows disassembling asequences hex letters representing
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The ``-m`` option allows disassembling asequence of hex letters representing
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ULP instructions.
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This option expects the actual instructions directly, without any ULP header.
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The sequence must contain a number of hex letters exactly divisible by 8, i.e.
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8, 16, 24, etc, because each 32-bit word is made up of 8 hex letters. Spaces
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8, 16, 24, etc., because each 32-bit word is made up of 8 hex letters. Spaces
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can be included in the sequence and they are ignored.
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The typical use case for this feature is to copy/paste some instructions from
@@ -148,11 +148,11 @@ The disassembler also works when used on an ESP32 device.
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To use the disassembler on a real device:
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*ensure ``micropython-esp32-ulp`` is installed on the device (see `docs/index.rst</docs/index.rst>`_).
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*upload ``tools/disassemble.py`` ``tools/decode.py`` and ``tools/decode_s2.py`` to the device
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*Ensure ``micropython-esp32-ulp`` is installed on the device (see `docs/index.rst</docs/index.rst>`_).
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*Upload ``tools/disassemble.py``, ``tools/decode.py``, and ``tools/decode_s2.py`` to the device
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(any directory will do, as long as those 3 files are in the same directory)
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*the following example code assumes you placed the 3 files into the device's "root" directory
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*run the following (note, we must specify whichthe cpu the binary is for):
154+
*The following example code assumes you placed the 3 files into the device's "root" directory
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*Run the following (note, we must specify whichCPU the binary is for):
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..code-block::python
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‎docs/index.rst‎

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++++++++++++
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The simplest example to try on the ESP32 is `counter.py</examples/counter.py>`_.
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It shows how to assemble code, load and run the resulting binary and exchange
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It shows how to assemble code, load and run the resulting binary, and exchange
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data between the ULP and the main CPU.
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Run the ``counter.py`` example:
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micropython -m esp32_ulp path/to/code.S# this results in path/to/code.ulp
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The assembler supports selecting a CPU to assemble for using the ``-c`` option
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(validcpu's are ``esp32`` and ``esp32s2``):
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(validCPUs are ``esp32`` and ``esp32s2``):
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..code-block::shell
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time matters.
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Splitting the assembly and load stage can be combined with other techniques,
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for example to implement a cachingmechansim for the ULP binary that
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for example, to implement a cachingmechanism for the ULP binary that
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automatically updates the binary every time the assembly source code changes.
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The ``esp32_ulp.assemble_file`` function can be used to assemble and link an
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# start the ULP
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# assemble_file printed offsets in number of 32-bit words.
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# ulp.run() expects an offset in number of bytes.
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# Thus, multiply the offsetto our entry point by 4.
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# Thus, multiply the offsetof our entry point by 4.
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# e.g. for an offset of 2:
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# 2 words * 4 = 8 bytes
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ulp.run(2*4)# specify the offset of the entry point label
@@ -173,14 +173,14 @@ Testing
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-------
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There are unit tests and also compatibility tests that check whether the binary
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output is identicalwith what Espressif's esp32-elf-as (from their `binutils-gdb fork
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output is identicalto what Espressif's esp32-elf-as (from their `binutils-gdb fork
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<https://github.com/espressif/binutils-gdb/tree/esp32ulp-elf-2.35>`_) produces.
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micropython-esp32-ulp has been tested on the Unix port of MicroPython and on real ESP32
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devices with the chip type ESP32D0WDQ6 (revision 1) without SPIRAM as well as ESP32-S2
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(ESP32-S2FH4) and ESP32-S3 (ESP32-S3R8) devices.
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Consult theGithub Actions `workflow definition file</.github/workflows/run_tests.yaml>`_
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Consult theGitHub Actions `workflow definition file</.github/workflows/run_tests.yaml>`_
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for how to run the different tests.
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‎docs/preprocess.rst‎

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framework's include files (such as ``RTC_GPIO_IN_REG``), to make reading
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and writing from/to peripheral registers much easier.
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In order to do this the preprocessor has two capabilities:
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In order to do this, the preprocessor has two capabilities:
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1. Parse and replace identifiers defined with ``#define``
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2. Recognise the ``WRITE_RTC_*`` and ``READ_RTC_*`` macros and expand
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Usage
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------------------------
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Normally the assembler is called as follows
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Normally the assembler is called as follows:
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..code-block::python
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Because the micropython-esp32-ulp assembler was built for running on the ESP32
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microcontroller with limited RAM, the preprocessor aims to work there too.
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To handle large number of defined constants (such as the ``RTC_*`` constants from
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the ESP-IDF) the preprocessor can use a database (based onBerkleyDB) stored on the
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To handlealarge number of defined constants (such as the ``RTC_*`` constants from
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the ESP-IDF) the preprocessor can use a database (based onBerkeley DB) stored on the
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device's filesystem for looking up defines.
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The database needs to be populated before preprocessing. (Usually, when only using
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database from include files. The resulting file will be called
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``defines.db``.
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70-
(The followingassume running on a PC. To do this on device, refer to the
70+
(The followingassumes running on a PC. To do this on device, refer to the
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`esp32_ulp/parse_to_db.py<../esp32_ulp/parse_to_db.py>`_ file.)
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..code-block::bash
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# if file system space is not a concern, the following can be convenient
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# by including all relevant include files from the ESP-IDF framework.
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# This results in an approximately2MB large database.
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# This results in an approximately2 MB large database.
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micropython -m esp32_ulp.parse_to_db \
8888
esp-idf/components/soc/esp32/include/soc/*.h \
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esp-idf/components/esp_common/include/*.h
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# most ULP code uses only 5 include files. Parsing only those into the
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# database should thus allow assembling virtually all ULP code one would
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# find or want to write.
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# This results in an approximately250kB large database.
94+
# This results in an approximately250 kB large database.
9595
micropython -m esp32_ulp.parse_to_db \
9696
esp-idf/components/soc/esp32/include/soc/{soc,soc_ulp,rtc_cntl_reg,rtc_io_reg,sens_reg}.h
9797
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..warning::
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101-
`:warning:`Ensure that you include the header files for the correct
101+
Ensure that you include the header files for the correct
102102
variant you are working with. In the example code above, simply switch
103103
``esp32`` to ``esp32s2`` or ``esp32s3`` in the path to the include files.
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@@ -118,7 +118,7 @@ are not needed on the device either.)
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is taken not to create an empty database file, cluttering up the filesystem,
119119
when not needed).
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If you do not want the preprocessoruse use a DefinesDB, pass ``False`` to
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If you do not want the preprocessorto use a DefinesDB, pass ``False`` to
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the ``use_defines_db`` argument of the ``preprocess`` convenience function,
123123
or instantiate the ``Preprocessor`` class directly, without passing it a
124124
DefinesDB instance via ``use_db``.
@@ -129,7 +129,7 @@ Design choices
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130130
The preprocessor does not support:
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132-
1. Functionstyle macros such as:code:`#define f(a,b) (a+b)`
132+
1. Function-style macros such as:code:`#define f(a,b) (a+b)`
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This is not important, because there are only few RTC macros that need
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to be supported and they are simply implemented as Python functions.

‎esp32_ulp/__main__.py‎

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ifsys.argv[1]in ('-c','--mcpu'):
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cpu=sys.argv[2].lower()
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ifcpunotin ('esp32','esp32s2'):
23-
raiseValueError('Invalidcpu')
23+
raiseValueError('InvalidCPU')
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filename=sys.argv[3]
2525
main(filename,cpu)
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