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Commit081fe48

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ci(pre-commit): Apply automatic fixes
1 parent430943b commit081fe48

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4 files changed

+20
-23
lines changed

4 files changed

+20
-23
lines changed

‎cores/esp32/esp32-hal-cpu.c‎

Lines changed: 12 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -34,36 +34,36 @@
3434
#ifCONFIG_IDF_TARGET_ESP32// ESP32/PICO-D4
3535
#include"xtensa_timer.h"
3636
#include"esp32/rom/rtc.h"
37-
staticconstchar*clock_source_names[]= {"XTAL","PLL","8.5M","APLL"};
37+
staticconstchar*clock_source_names[]= {"XTAL","PLL","8.5M","APLL"};
3838
#elifCONFIG_IDF_TARGET_ESP32S2
3939
#include"xtensa_timer.h"
4040
#include"esp32s2/rom/rtc.h"
41-
staticconstchar*clock_source_names[]= {"XTAL","PLL","8.5M","APLL"};
41+
staticconstchar*clock_source_names[]= {"XTAL","PLL","8.5M","APLL"};
4242
#elifCONFIG_IDF_TARGET_ESP32S3
4343
#include"xtensa_timer.h"
4444
#include"esp32s3/rom/rtc.h"
45-
staticconstchar*clock_source_names[]= {"XTAL","PLL","17.5M"};
45+
staticconstchar*clock_source_names[]= {"XTAL","PLL","17.5M"};
4646
#elifCONFIG_IDF_TARGET_ESP32C2
4747
#include"esp32c2/rom/rtc.h"
48-
staticconstchar*clock_source_names[]= {"XTAL","PLL","17.5M"};
48+
staticconstchar*clock_source_names[]= {"XTAL","PLL","17.5M"};
4949
#elifCONFIG_IDF_TARGET_ESP32C3
5050
#include"esp32c3/rom/rtc.h"
51-
staticconstchar*clock_source_names[]= {"XTAL","PLL","17.5M"};
51+
staticconstchar*clock_source_names[]= {"XTAL","PLL","17.5M"};
5252
#elifCONFIG_IDF_TARGET_ESP32C6
5353
#include"esp32c6/rom/rtc.h"
54-
staticconstchar*clock_source_names[]= {"XTAL","PLL","17.5M"};
54+
staticconstchar*clock_source_names[]= {"XTAL","PLL","17.5M"};
5555
#elifCONFIG_IDF_TARGET_ESP32H2
5656
#include"esp32h2/rom/rtc.h"
57-
staticconstchar*clock_source_names[]= {"XTAL","PLL","8.5M","FLASH_PLL"};
57+
staticconstchar*clock_source_names[]= {"XTAL","PLL","8.5M","FLASH_PLL"};
5858
#elifCONFIG_IDF_TARGET_ESP32P4
5959
#include"esp32p4/rom/rtc.h"
60-
staticconstchar*clock_source_names[]= {"XTAL","CPLL","17.5M"};
60+
staticconstchar*clock_source_names[]= {"XTAL","CPLL","17.5M"};
6161
#elifCONFIG_IDF_TARGET_ESP32C5
6262
#include"esp32c5/rom/rtc.h"
63-
staticconstchar*clock_source_names[]= {"XTAL","17.5M","PLL_F160M","PLL_F240M"};
63+
staticconstchar*clock_source_names[]= {"XTAL","17.5M","PLL_F160M","PLL_F240M"};
6464
#elifCONFIG_IDF_TARGET_ESP32C61
6565
#include"esp32c61/rom/rtc.h"
66-
staticconstchar*clock_source_names[]= {"XTAL","17.5M","PLL_F160M"};
66+
staticconstchar*clock_source_names[]= {"XTAL","17.5M","PLL_F160M"};
6767
#else
6868
#error Target CONFIG_IDF_TARGET is not supported
6969
#endif
@@ -251,7 +251,8 @@ const char *getSupportedCpuFrequencyMhz(uint8_t xtal) {
251251
boolsetCpuFrequencyMhz(uint32_tcpu_freq_mhz) {
252252
rtc_cpu_freq_config_tconf,cconf;
253253
uint32_tcapb,apb;
254-
[[maybe_unused]]uint8_txtal=0;
254+
[[maybe_unused]]
255+
uint8_txtal=0;
255256

256257
// ===== Get XTAL Frequency and validate input =====
257258
#ifTARGET_HAS_XTAL_FREQ

‎cores/esp32/esp32-hal-gpio.c‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -127,10 +127,10 @@ extern void ARDUINO_ISR_ATTR __pinMode(uint8_t pin, uint8_t mode) {
127127
gpiohal.dev=GPIO_LL_GET_HW(GPIO_PORT_0);
128128

129129
gpio_config_tconf= {
130-
.pin_bit_mask= (1ULL <<pin),/*!< GPIO pin: set with bit mask, each bit maps to a GPIO */
131-
.mode=GPIO_MODE_DISABLE,/*!< GPIO mode: set input/output mode */
132-
.pull_up_en=GPIO_PULLUP_DISABLE,/*!< GPIO pull-up */
133-
.pull_down_en=GPIO_PULLDOWN_DISABLE,/*!< GPIO pull-down */
130+
.pin_bit_mask= (1ULL <<pin),/*!< GPIO pin: set with bit mask, each bit maps to a GPIO */
131+
.mode=GPIO_MODE_DISABLE,/*!< GPIO mode: set input/output mode */
132+
.pull_up_en=GPIO_PULLUP_DISABLE,/*!< GPIO pull-up */
133+
.pull_down_en=GPIO_PULLDOWN_DISABLE,/*!< GPIO pull-down */
134134
#ifndefCONFIG_IDF_TARGET_ESP32C61
135135
.intr_type=gpiohal.dev->pin[pin].int_type/*!< GPIO interrupt type - previously set */
136136
#else

‎cores/esp32/esp32-hal-i2c-slave.c‎

Lines changed: 2 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -328,13 +328,8 @@ esp_err_t i2cSlaveInit(uint8_t num, int sda, int scl, uint16_t slaveID, uint32_t
328328
frequency=100000L;
329329
}
330330
frequency= (frequency*5) /4;
331-
#ifCONFIG_IDF_TARGET_ESP32|| \
332-
CONFIG_IDF_TARGET_ESP32C2|| \
333-
CONFIG_IDF_TARGET_ESP32C3|| \
334-
CONFIG_IDF_TARGET_ESP32C6|| \
335-
CONFIG_IDF_TARGET_ESP32H2|| \
336-
CONFIG_IDF_TARGET_ESP32S2|| \
337-
CONFIG_IDF_TARGET_ESP32S3
331+
#ifCONFIG_IDF_TARGET_ESP32||CONFIG_IDF_TARGET_ESP32C2||CONFIG_IDF_TARGET_ESP32C3||CONFIG_IDF_TARGET_ESP32C6||CONFIG_IDF_TARGET_ESP32H2 \
332+
||CONFIG_IDF_TARGET_ESP32S2||CONFIG_IDF_TARGET_ESP32S3
338333
if (i2c->num==0) {
339334
periph_ll_enable_clk_clear_rst(PERIPH_I2C0_MODULE);
340335
#ifSOC_HP_I2C_NUM>1

‎cores/esp32/esp32-hal.h‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,8 @@ extern "C" {
6363

6464
#ifCONFIG_IDF_TARGET_ESP32||CONFIG_IDF_TARGET_ESP32S2||CONFIG_IDF_TARGET_ESP32S3
6565
staticconstuint8_tBOOT_PIN=0;
66-
#elifCONFIG_IDF_TARGET_ESP32C2||CONFIG_IDF_TARGET_ESP32C3||CONFIG_IDF_TARGET_ESP32C6||CONFIG_IDF_TARGET_ESP32C61||CONFIG_IDF_TARGET_ESP32H2||CONFIG_IDF_TARGET_ESP32C61
66+
#elifCONFIG_IDF_TARGET_ESP32C2||CONFIG_IDF_TARGET_ESP32C3||CONFIG_IDF_TARGET_ESP32C6||CONFIG_IDF_TARGET_ESP32C61||CONFIG_IDF_TARGET_ESP32H2 \
67+
||CONFIG_IDF_TARGET_ESP32C61
6768
staticconstuint8_tBOOT_PIN=9;
6869
#elifCONFIG_IDF_TARGET_ESP32P4
6970
staticconstuint8_tBOOT_PIN=35;

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