@@ -270,8 +270,11 @@ uint8_t TWI_MasterRead(uint8_t slave_address,
270270 * \param bytesToWrite Number of bytes to write.
271271 * \param bytesToRead Number of bytes to read.
272272 *
273- * \retval true If transaction could be started.
274- * \retval false If transaction could not be started.
273+ * \retval 0:success
274+ * \retval 1:data too long to fit in transmit buffer
275+ * \retval 2:received NACK on transmit of address
276+ * \retval 3:received NACK on transmit of data
277+ * \retval 4:other error
275278 */
276279uint8_t TWI_MasterWriteRead (uint8_t slave_address ,
277280uint8_t * write_data ,
@@ -335,8 +338,21 @@ uint8_t TWI_MasterWriteRead(uint8_t slave_address,
335338// return bytes really read
336339ret = master_bytesRead ;
337340}else {
338- // return 0 if success, >0 otherwise
339- ret = (master_result == TWIM_RESULT_OK ?0 :1 );
341+ // return 0 if success, >0 otherwise (follow classic AVR conventions)
342+ switch (master_result ) {
343+ case TWIM_RESULT_OK :
344+ ret = 0 ;
345+ break ;
346+ case TWIM_RESULT_BUFFER_OVERFLOW :
347+ ret = 1 ;
348+ break ;
349+ case TWIM_RESULT_NACK_RECEIVED :
350+ ret = 3 ;
351+ break ;
352+ default :
353+ ret = 4 ;
354+ break ;
355+ }
340356}
341357
342358return ret ;