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ARM processor implementation, hazard unit, forwarding unit, SRAM & cache memory.

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MisaghM/Computer-Architecture-Lab-Projects

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Experiments of the computer architecture laboratory course at University of Tehran.

  • ARM Processor Implementation (P1 - P4)
  • Forwarding Unit (P5)
  • SRAM (P6)
  • Cache Memory (P7)

MisaghM &PashaBarahimi

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ARM processor implementation, hazard unit, forwarding unit, SRAM & cache memory.

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