|
83 | 83 | ARG_hsync, |
84 | 84 | ARG_vsync, |
85 | 85 | ARG_de, |
86 | | -ARG_disp, |
87 | 86 | ARG_pclk, |
88 | | -ARG_data0, |
89 | | -ARG_data1, |
90 | | -ARG_data2, |
91 | | -ARG_data3, |
92 | | -ARG_data4, |
93 | | -ARG_data5, |
94 | | -ARG_data6, |
95 | | -ARG_data7, |
96 | | -ARG_data8, |
97 | | -ARG_data9, |
98 | | -ARG_data10, |
99 | | -ARG_data11, |
100 | | -ARG_data12, |
101 | | -ARG_data13, |
102 | | -ARG_data14, |
103 | | -ARG_data15, |
| 87 | +ARG_data_pins, |
104 | 88 | ARG_freq, |
105 | 89 | ARG_hsync_front_porch, |
106 | 90 | ARG_hsync_back_porch, |
|
121 | 105 | {MP_QSTR_hsync,MP_ARG_INT |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
122 | 106 | {MP_QSTR_vsync,MP_ARG_INT |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
123 | 107 | {MP_QSTR_de,MP_ARG_INT |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
124 | | - {MP_QSTR_disp,MP_ARG_INT |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
125 | 108 | {MP_QSTR_pclk,MP_ARG_INT |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
126 | | - {MP_QSTR_data0,MP_ARG_INT |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
127 | | - {MP_QSTR_data1,MP_ARG_INT |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
128 | | - {MP_QSTR_data2,MP_ARG_INT |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
129 | | - {MP_QSTR_data3,MP_ARG_INT |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
130 | | - {MP_QSTR_data4,MP_ARG_INT |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
131 | | - {MP_QSTR_data5,MP_ARG_INT |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
132 | | - {MP_QSTR_data6,MP_ARG_INT |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
133 | | - {MP_QSTR_data7,MP_ARG_INT |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
134 | | - {MP_QSTR_data8,MP_ARG_INT |MP_ARG_KW_ONLY, { .u_int=-1 } }, |
135 | | - {MP_QSTR_data9,MP_ARG_INT |MP_ARG_KW_ONLY, { .u_int=-1 } }, |
136 | | - {MP_QSTR_data10,MP_ARG_INT |MP_ARG_KW_ONLY, { .u_int=-1 } }, |
137 | | - {MP_QSTR_data11,MP_ARG_INT |MP_ARG_KW_ONLY, { .u_int=-1 } }, |
138 | | - {MP_QSTR_data12,MP_ARG_INT |MP_ARG_KW_ONLY, { .u_int=-1 } }, |
139 | | - {MP_QSTR_data13,MP_ARG_INT |MP_ARG_KW_ONLY, { .u_int=-1 } }, |
140 | | - {MP_QSTR_data14,MP_ARG_INT |MP_ARG_KW_ONLY, { .u_int=-1 } }, |
141 | | - {MP_QSTR_data15,MP_ARG_INT |MP_ARG_KW_ONLY, { .u_int=-1 } }, |
| 109 | + {MP_QSTR_data_pins,MP_ARG_OBJ |MP_ARG_KW_ONLY |MP_ARG_REQUIRED }, |
142 | 110 | {MP_QSTR_freq,MP_ARG_INT |MP_ARG_KW_ONLY, { .u_int=8000000 } }, |
143 | 111 | {MP_QSTR_hsync_front_porch,MP_ARG_INT |MP_ARG_KW_ONLY, { .u_int=0 } }, |
144 | 112 | {MP_QSTR_hsync_back_porch,MP_ARG_INT |MP_ARG_KW_ONLY, { .u_int=0 } }, |
|
151 | 119 | {MP_QSTR_de_idle_high,MP_ARG_BOOL |MP_ARG_KW_ONLY, { .u_bool= false } }, |
152 | 120 | {MP_QSTR_pclk_idle_high,MP_ARG_BOOL |MP_ARG_KW_ONLY, { .u_bool= false } }, |
153 | 121 | {MP_QSTR_pclk_active_low,MP_ARG_BOOL |MP_ARG_KW_ONLY, { .u_bool= false } }, |
154 | | - {MP_QSTR_disp_active_low,MP_ARG_BOOL |MP_ARG_KW_ONLY, { .u_bool= false } }, |
155 | 122 | {MP_QSTR_refresh_on_demand,MP_ARG_BOOL |MP_ARG_KW_ONLY, { .u_bool= false } }, |
156 | 123 | }; |
157 | 124 |
|
|
183 | 150 | self->panel_io_config.vsync_gpio_num= (int)args[ARG_vsync].u_int; |
184 | 151 | self->panel_io_config.de_gpio_num= (int)args[ARG_de].u_int; |
185 | 152 | self->panel_io_config.pclk_gpio_num= (int)args[ARG_pclk].u_int; |
186 | | -self->panel_io_config.data_gpio_nums[0]= (int)args[ARG_data0].u_int; |
187 | | -self->panel_io_config.data_gpio_nums[1]= (int)args[ARG_data1].u_int; |
188 | | -self->panel_io_config.data_gpio_nums[2]= (int)args[ARG_data2].u_int; |
189 | | -self->panel_io_config.data_gpio_nums[3]= (int)args[ARG_data3].u_int; |
190 | | -self->panel_io_config.data_gpio_nums[4]= (int)args[ARG_data4].u_int; |
191 | | -self->panel_io_config.data_gpio_nums[5]= (int)args[ARG_data5].u_int; |
192 | | -self->panel_io_config.data_gpio_nums[6]= (int)args[ARG_data6].u_int; |
193 | | -self->panel_io_config.data_gpio_nums[7]= (int)args[ARG_data7].u_int; |
194 | | -self->panel_io_config.data_gpio_nums[8]= (int)args[ARG_data8].u_int; |
195 | | -self->panel_io_config.data_gpio_nums[9]= (int)args[ARG_data9].u_int; |
196 | | -self->panel_io_config.data_gpio_nums[10]= (int)args[ARG_data10].u_int; |
197 | | -self->panel_io_config.data_gpio_nums[11]= (int)args[ARG_data11].u_int; |
198 | | -self->panel_io_config.data_gpio_nums[12]= (int)args[ARG_data12].u_int; |
199 | | -self->panel_io_config.data_gpio_nums[13]= (int)args[ARG_data13].u_int; |
200 | | -self->panel_io_config.data_gpio_nums[14]= (int)args[ARG_data14].u_int; |
201 | | -self->panel_io_config.data_gpio_nums[15]= (int)args[ARG_data15].u_int; |
| 153 | + |
| 154 | +mp_obj_tuple_t*data_pins=MP_OBJ_TO_PTR(args[ARG_data_pins].u_obj); |
| 155 | + |
| 156 | +for (size_ti=0;i<data_pins->len;i++) { |
| 157 | +self->panel_io_config.data_gpio_nums[i]= (int)mp_obj_get_int(data_pins->items[i]); |
| 158 | + } |
| 159 | + |
| 160 | +for (size_ti=data_pins->len;i<16;i++) { |
| 161 | +self->panel_io_config.data_gpio_nums[i]=-1; |
| 162 | + } |
| 163 | + |
| 164 | +self->panel_io_config.data_width= (size_t)data_pins->len; |
| 165 | + |
202 | 166 | self->panel_io_config.disp_gpio_num= (int)args[ARG_disp].u_int; |
203 | 167 | self->panel_io_config.sram_trans_align=8; |
204 | 168 | self->panel_io_config.psram_trans_align=64; |
|
207 | 171 | self->panel_io_config.flags.fb_in_psram=0; |
208 | 172 | self->panel_io_config.flags.double_fb=0; |
209 | 173 |
|
210 | | -inti=0; |
211 | | -for (;i<16;i++) { |
212 | | -if (self->panel_io_config.data_gpio_nums[i]==-1) { |
213 | | -break; |
214 | | - } |
215 | | - } |
216 | 174 |
|
217 | | -self->panel_io_config.data_width= (size_t)i; |
218 | 175 |
|
219 | 176 | #ifCONFIG_LCD_ENABLE_DEBUG_LOG |
220 | 177 | printf("pclk_hz=%lu\n",self->bus_config.pclk_hz); |
|