Awired logic connection is alogic gate that implementsboolean algebra (logic) using only passive components such asdiodes andresistors. A wired logic connection can create anAND or anOR gate. Limitations include the inability to create aNOT gate, the lack ofamplification to provide level restoration, and its constantohmic heating for most logic (particularly more thanCMOS) which indirectly limits density of components and speed.
Wired logic works by exploiting thehigh impedance ofopen collector outputs (and its variants: open emitter, open drain, or open source) by just adding apull-up or pull-down resistor to avoltage source, or can be applied topush-pull outputs by usingdiode logic (with the disadvantage of incurring adiode drop voltage loss).
See also:Diode logic § Active-high AND logic gate
The wired AND connection is a form ofAND gate. When using open collector or similar outputs (which can be identified by the ⎐ symbol in schematics), wired AND only requires apull up resistor on the shared output wire. In this example, 5V is considered HIGH (true), and 0V is LOW (false). This gate can be easily extended with more inputs.
Whenall inputs are HIGH, they all present high impedance, and the pull-up resistor pulls output voltage HIGH, but ifany input is LOW, they pull the output LOW:[1]
| Inputs | Output | |
|---|---|---|
| A | B | A AND B |
| HIGH | LOW | LOW |
| LOW | HIGH | LOW |
| LOW | LOW | LOW |
| HIGH | HIGH | HIGH |
When driving aload, the HIGH output is reduced by the pull-up'svoltage drop, though the LOW output is almost 0V. But ifdiode logic is used, each input requires a diode, and the LOW output voltage will additionally be raised by thediode's forward voltage. Care should be taken to ensure the output still lies withinvalid voltage levels.
See also:Diode logic § Active-high OR logic gate
The wired OR connection electrically performs theBoolean logic operation of an OR gate using open emitter or similar inputs (which can be identified by the ⎏ symbol in schematics) connected to a shared output with a pull-down resistor. This gate can also be easily extended with more inputs.
Whenall inputs are LOW, they all present high impedance, and the pull-down resistor pulls the output voltage LOW, but ifany input is HIGH, they pull the output HIGH:
| Inputs | Output | |
|---|---|---|
| A | B | A OR B |
| LOW | LOW | LOW |
| LOW | HIGH | HIGH |
| HIGH | LOW | HIGH |
| HIGH | HIGH | HIGH |
When driving a load, the LOW output is raised by the pull-down's voltage drop, though the HIGH output is almost the supply voltage (5V). But ifdiode logic is used, each input requires a diode, and the HIGH output voltage will additionally be lowered by thediode's forward voltage.
An active-high wired AND can be treated as active-low wired OR (and an active-high wired OR can be treated as active-low wired AND), by usingactive-low logic (or negative logic) and applyingDe Morgan's laws.
Diode logic uses a diode for each input in addition to a shared pull-up resistor (for wired AND) or a pull-down resistor (for wired OR). However, each stage of diode logic reduces output voltage levels. So withoutamplification, the output voltage may not be compatible with the primary logic family.