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WinChip

From Wikipedia, the free encyclopedia
(Redirected fromWinchip)
Series of CPUs
WinChip
IDT WinChip Marketing sample
General information
Launched1997; 28 years ago (1997)
Discontinued1999; 26 years ago (1999)
Marketed byIDT
Designed byCentaur Technology
CPUID code0540h, 0541h, 0585h, 0587h, 058Ah, 0595h
Performance
Max.CPUclock rate180 Mhz to 266 Mhz
FSB speeds60 MT/s to 100 MT/s
Cache
L1cache64KiB (C6, W2, W2A and W2B)
128 KiB (W3)
L2 cacheMotherboard dependent
L3 cachenone
Architecture and classification
Technology node0.35 μm to 0.25 μm
MicroarchitectureSingle, 4-stage,pipelinein-order execution
Instruction setx86-16,IA-32
Physical specifications
Cores
  • 1
Packages
Sockets
Products, models, variants
Core names
  • C6
  • W2, C6+
  • W2A
  • W2B
  • W3
Brand name
  • WinChip
History
SuccessorCyrix III

TheWinChip series is a discontinuedlow-powerSocket 7-basedx86processor that was designed byCentaur Technology and marketed by its parent companyIDT.

Overview

[edit]

Design

[edit]

The design of the WinChip was quite different from other processors of the time. Instead of a largegate count anddie area, IDT, using its experience from theRISC processor market, created a small and electrically efficient processor similar to the80486, because of its singlepipeline andin-order executionmicroarchitecture. It was of much simpler design than its Socket 7 competitors, such asAMD K5/K6, which weresuperscalar and based on dynamic translation to bufferedmicro-operations with advanced instruction reordering (out of order execution).

Use

[edit]

WinChip was, in general, designed to perform well with popular applications that did few floating point calculations, if any. This includedoperating systems of the time and the majority of software used in businesses. It was also designed to be a drop-in replacement for the more complex, and thus more expensive, processors it was competing with. This allowed IDT/Centaur to take advantage of an established system platform (Intel'sSocket 7).

Later developments

[edit]

WinChip 2, an update of C6, retained the simple in-order execution pipeline of its predecessor, but added dual MMX/3DNow! processing units that could operate in superscalar execution.[1] This made it the only non-AMD CPU on Socket 7 to support 3DNow! instructions. WinChip 2A addedfractional multipliers and adopted a 100 MHzfront side bus to improve memory access and L2 cache performance.[2] It also adopted aperformance rating nomenclature instead of reporting the real clock speed, similar to contemporary AMD andCyrix processors.

Another revision, the WinChip 2B, was also planned. This featured a die shrink to 0.25 μm, but was only shipped in limited numbers.[3]

A third model, the WinChip 3, was planned as well. This was meant to receive a doubled L1 cache, but the W3 CPU never made it to market.[3]

Performance

[edit]

Although the small die size and low power-usage made the processor notably inexpensive to manufacture, it never gained much market share. WinChip C6 was a competitor to theIntel Pentium andPentium MMX,Cyrix 6x86, and AMD K5/K6. It performed adequately, but only in applications that used littlefloating point math. Its floating point performance was simply well below that of the Pentium and K6, being even slower than the Cyrix 6x86.[4]

Decline

[edit]

The industry's move away fromSocket 7 and the release of theIntelCeleron processor signalled the end of the WinChip. In 1999, theCentaur Technology division of IDT was sold toVIA. Although VIA branded the processors as "Cyrix", the company initially used technology similar to the WinChip in itsCyrix III line.[5]

Data

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Winchip C6 (0.35 μm)

[edit]
IDT WinChip C6
IDT WinChip C6die shot
  • All models supportedMMX[6]
  • The 88 mm2 die was made using a 0.35 micron 4-layer metal CMOS technology.[6]
  • The 64 Kib L1 Cache of the WinChip C6 used a 32 KB 2-way set associative code cache and a 32 KB 2-way set associative data cache.[6]
Processor
model
FrequencyFSBMult.L1 cacheTDPCPU core voltageSocketRelease datePart number(s)Introduction price
WinChip 180180 MHz60MT/s364KiB9.4 W3.45—3.6 V13 October 1997DS180GAEM$90
WinChip 200200 MHz66 MT/s364 KiB10.4 W3.45—3.6 V
  • Socket 5
  • Socket 7
  • Super Socket 7
  • CPGA 296
13 October 1997DS200GAEM$135
WinChip 225225 MHz75 MT/s364 KiB12.3 W3.45—3.6 V
  • Socket 7
  • Super Socket 7
  • CPGA 296
13 October 1997PSME225GA
WinChip 240240 MHz60 MT/s464 KiB13.1 W3.45—3.6 V
  • Socket 5
  • Socket 7
  • Super Socket 7
  • CPGA 296
November 1997?PSME240GA

WinChip 2 (0.35 μm)

[edit]
IDT WinChip2
  • All models supportedMMX[3] and3DNow![3]
  • The 95 mm2 die was made using a 0.35 micron 5-layer metal CMOS technology.[3]
  • The 64 Kib L1 Cache of the WinChip 2 used a 32 KB 2-way set associative code cache and a 32 KB 4-way set associative data cache.
Processor
model
FrequencyFSBMult.L1 cacheTDPCPU core voltageSocketRelease datePart number(s)Introduction price
WinChip 2-200200 MHz66MT/s364KiB8.8 W3.45—3.6 V3DEE200GSA
3DFF200GSA
WinChip 2-225225 MHz75 MT/s364 KiB10.0 W3.45—3.6 V
  • Socket 7
  • Super Socket 7
  • CPGA 296
3DEE225GSA
WinChip 2-240240 MHz60 MT/s464 KiB10.5 W3.45—3.6 V
  • Socket 5
  • Socket 7
  • Super Socket 7
  • CPGA 296
3DEE240GSA
WinChip 2-250250 MHz83 MT/s364 KiB10.9 W3.45—3.6 V
  • Super Socket 7
  • CPGA 296
?

WinChip 2A (0.35 μm)

[edit]
IDT WinChip2A
IDT WinChip2A die shot
  • All models supportedMMX[1] and3DNow![1]
  • The 95 mm2 die was made using a 0.35 micron 5-layer metal CMOS technology.[3]
  • The 64 Kib L1 Cache of the WinChip 2A used a 32 KB 2-way set associative code cache and a 32 KB 4-way set associative data cache.[1]
Processor
model
FrequencyFSBMult.L1 cacheTDPCPU core voltageSocketRelease datePart number(s)Introduction price
WinChip 2A-200200 MHz66MT/s364KiB12.0 W3.45—3.6 VMarch 1999?3DEE200GTA
WinChip 2A-233233 MHz66 MT/s3.564 KiB13.0 W3.45—3.6 V
  • Socket 5
  • Socket 7
  • Super Socket 7
  • CPGA 296
March 1999?3DEE233GTA
WinChip 2A-266233 MHz100 MT/s2.3364 KiB14.0 W3.45—3.6 V
  • Super Socket 7
  • CPGA 296
March 1999?3DEE266GSA
WinChip 2A-300250 MHz100 MT/s2.564 KiB16.0 W3.45—3.6 V
  • Super Socket 7
  • CPGA 296
3DEE300GSA

WinChip 2B (0.25 μm)

[edit]
IDT WinChip2 W2B
  • All models supportedMMX[7] and3DNow![7]
  • The 58 mm2 die was made using a 0.25 micron 5-layer metal CMOS technology.[3]
  • The 64 Kib L1 Cache of the WinChip 2B used a 32 KB 2-way set associative code cache and a 32 KB 4-way set associative data cache.[7]
  • Dual-voltage CPU: while the processor core operates at 2.8 V, the externalinput/output (I/O) voltages remain 3.3 V for backwards compatibility.
Processor
model
FrequencyFSBMult.L1 cacheTDPCPU core voltageSocketRelease datePart number(s)Introduction price
WinChip 2B-200200 MHz66MT/s364KiB6.3 W2.7—2.9 V3DFK200BTA
WinChip 2B-233200 MHz100 MT/s264 KiB6.3 W2.7—2.9 V
  • Super Socket 7
  • PPGA 296

WinChip 3 (0.25 μm)

[edit]
  • All models supportedMMX[8] and3DNow![8]
  • The 75 mm2 die was made using a 0.25 micron 5-layer metal CMOS technology.[3]
  • The 128 Kib L1 Cache of the WinChip 3 used a 64 KB 2-way set associative code cache and a 64 KB 4-way set associative data cache.[8]
  • Dual-voltage CPU: while the processor core operates at 2.8 volts, the externalinput/output (I/O) voltages remain 3.3 volts for backwards compatibility.
Processor
model
FrequencyFSBMult.L1 cacheTDPCPU core voltageSocketRelease datePart number(s)Introduction price
WinChip 3-233200 MHz66MT/s3128KiB? W2.7—2.9 V
WinChip 3-266233 MHz66 MT/s3.5128 KiB8.4 W2.7—2.9 V
  • Socket 7
  • Super Socket 7
  • CPGA 296
Samples onlyFK233GDA
WinChip 3-300233 MHz100 MT/s2.33128 KiB8.4 W2.7—2.9 V
  • Super Socket 7
  • CPGA 296
Samples onlyFK300GDA
WinChip 3-300266 MHz66 MT/s4128 KiB9.3 W2.7—2.9 V
  • Socket 7
  • Super Socket 7
  • CPGA 296
WinChip 3-333250 MHz100 MT/s2.5128 KiB8.8 W2.7—2.9 V
  • Super Socket 7
  • CPGA 296
WinChip 3-333266 MHz100 MT/s2.66128 KiB9.3 W2.7—2.9 V
  • Super Socket 7
  • CPGA 296

See also

[edit]

References

[edit]
  1. ^abcd"PROCESSOR Version A Data Sheet"(PDF). January 1999. Archived from the original on March 22, 2003. Retrieved2 November 2011.
  2. ^Hare, Chris."Processor Speed Settings". Archived fromthe original on 28 April 2007. Retrieved24 April 2007.
  3. ^abcdefgh"IA-32 implementation: Centaur WinChip 2".SandPile.org. Archived fromthe original on 27 April 2007. Retrieved29 April 2007.
  4. ^Pabst, Thomas (9 October 1997)."The IDT WinChip C6 CPU".Tom's Hardware. Retrieved29 April 2007.
  5. ^Witheiler, Matthew (5 January 2001)."The New VIA Cyrix III: The Worlds First 0.15 Micron x86 CPU".AnandTech. Retrieved29 April 2007.
  6. ^abc"IA-32 implementation: Centaur WinChip".Sandpile. Retrieved13 May 2007.
  7. ^abc"PROCESSOR Data Sheet for WinChip 2 version B"(PDF). April 1999. Archived from the original on October 13, 2011. Retrieved2 November 2011.
  8. ^abc"PROCESSOR Data Sheet"(PDF). April 1999. Archived from the original on June 14, 2001. Retrieved2 November 2011.

External links

[edit]
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