W. Wesley Peterson | |
|---|---|
 | |
| Born | April 22, 1924 Muskegon, Michigan, U.S. |
| Died | May 6, 2009 (aged 85) Honolulu, Hawaii, U.S. |
| Alma mater | University of Michigan (Ph.D.) |
| Awards | Japan Prize Claude E. Shannon Award |
| Scientific career | |
| Fields | Mathematics,computer science |
| Thesis | The Trajectron: An Experimental Dc Magnetron (1954) |
William Wesley Peterson (April 22, 1924 – May 6, 2009) was an American mathematician and computer scientist. He was best known for designing thecyclic redundancy check (CRC),[1] for which research he was awarded theJapan Prize in 1999.[2]
Peterson was born on April 22, 1924, inMuskegon, Michigan and earned hisPh.D. in 1954 from theUniversity of Michigan.[2][3] Peterson was a professor ofInformation and Computer Sciences at theUniversity of Hawaii at Manoa, joining the faculty in 1964.[4] He started work at IBM in 1954.[4] He authored the publication of algebraic coding theoryError Correcting Codes in 1961. He co-authored a number of books on the topic oferror correcting codes, including the revised 2nd edition ofError Correcting Codes[5] (co-authored withEdward J. Weldon). In the early 1950s, he contributed significantly to the development ofsignal detection theory through participation in theIRE Professional Group on Information Theory.[6] He has also done research and published in the fields ofprogramming languages,[7]systems programming, andnetworks. As well as theJapan Prize in 1999,[2][8] he was awarded theClaude E. Shannon Award in 1981,[4] and theIEEE Centennial Medal in 1984.[4] In 2007, two years before Peterson's death,Intel added crc32 to theSSE4.2 instruction set of thex86-64 architecture.[9]
Peterson finished 16th in the 2005 Honolulu Marathon for males ages 80 to 84.[10] He died on May 6, 2009, inHonolulu, Hawaii survived by five children from two different marriages, his wife, and several grandchildren.[3]
