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Dual-ported video RAM is a type ofdual-ported RAM derived fromdynamic RAM (DRAM), and was historically used to store theframebuffer ingraphics card, and was at the time often calledVRAM.
Unlike conventional DRAM, VRAM features two ports: one for the CPU and one for thevideo display controller (VDC). This architecture allows simultaneous access—while the CPU writes data, the VDC can read it independently. This eliminateswait states ensuring smoother performance and efficient screen rendering.
VRAM was widely used between the mid-1980s and mid-1990s. As newer high-performance memory technologies emerged, dual-ported VRAM was gradually phased out. Today, the term "VRAM" can refer to modern types of video memory as well, which can lead to confusion with this original dual-ported variant.
Early computers useddynamic RAM[a] to store video data to be output to a conventionaltelevision or a simple conversion of a television that acceptedcomposite video input. To work with such a display it is extremely important that the video hardware output a very accurately timed signal. At the speeds that contemporary memory worked at, reading data to feed to the video hardware used up much of the possible performance of the memory devices. This conflicted with the need for thecentral processing unit (CPU) to write data to memory for the video system to read, as both could not use the same memory at the same time.
Two general solutions were used to avoid timing issues. For higher-priced systems, the video systems had their own dedicated memory and used a separate system for the CPU to store data into it. This eliminated any possibility of contention for memory, but at the cost of requiring separate memory in an era when memory was very expensive. It also almost always communicated over a slowsystem bus that limited the speed that changes to the screen could be made, making interactive graphics difficult. The other solution, used by mosthome computers, was to use a single shared bank of memory and allow the video hardware to control access to memory, pausing the CPU when needed. This may lead to slower computing performance as the CPU is repeatedly put into these "wait states", but it had the advantage of being less expensive and allowing the CPU to more rapidly update the display and thus provide more interactivity.
By the early 1980s, the introduction of much higher-resolution monitors that demanded larger framebuffers, and the newly introducedgraphical user interfaces (GUI's) that required high resolution and high overall performance, made the performance of the video system an increasingly difficult problem. Complex systems like theAmiga emerged to carefully control access to memory and reduce contention, but while these reduced the problem they did not eliminate it.
The solution was to use memory that could be accessed by the CPU and video hardware at the same time. It was invented by F. Dill, D. Ling and R. Matick atIBM Research in 1980, with a patent issued in 1985 (US Patent 4,541,075).[1] The first commercial use of VRAM was in a high-resolution graphics adapter introduced in 1986 by IBM for itsIBM RT PC system, which set a new standard for graphics displays. Prior to the development of VRAM, dual-ported memory was quite expensive, limiting higher resolution bitmapped graphics to high-end workstations. VRAM improved the overall framebuffer throughput, allowing low cost, high-resolution, high-speed, color graphics. Modern GUI-based operating systems benefitted from this and thus it provided a key ingredient for proliferation ofgraphical user interfaces (GUI's) throughout the world at that time.
Dynamic RAM is internally arranged in an array of rows and columns ofcapacitors, with each row/column intersection holding a single bit in acell. In typical use, a CPU accessing a DRAM will ask for a small amount of data at a time, possibly a singlebyte. To read a byte for the CPU, the DRAM decodes the provided address into a series of eight cells containing the eight bits in that particular byte, reads the entire row containing those cells, andlatches the requested data so it can be read on thedata bus. At the time, rows were commonly 1,024 cells wide.
DRAM devices aredestructive, meaning that the act of reading a row also causes the data in it to be erased. To make the data permanent, any reading has to be followed by the DRAM writing the same data back to that row. This is the reason an entire row of 1,024 cells (for example) is read even though only eight are being called for by the processor, while the processor is reading that data over thedata bus, the DRAM copies the entire row back from the latches into that row, refreshing it. When one considers the process as a whole, this means the DRAM is repeatedly reading entire rows of data, selecting a single byte from that data and discarding the rest, and then writing it all back again.
VRAM operates by not discarding the excess bits in the row. Instead, the data read into the row storage is also sent to a second set of latches which is connected to an associatedbit shifter. From that point, the data can be read out one bit at a time by triggering the shifter. This requires only two pins, one for the output bit, and another for the input trigger (orstrobe). VRAM generally does not have twoaddress buses, meaning that the CPU and graphics still have to interleave their accesses to the chip, but as a whole row of data is read out to the graphics driver, and that row might represent multiple scan lines on the screen, the number of times it has to interrupt the CPU can be greatly reduced.[2]
Such operation is described in the paper "All points addressable raster display memory" by R. Matick, D. Ling, S. Gupta, and F. Dill, IBM Journal of R&D, Vol 28, No. 4, July 1984, pp. 379–393. To use the video port, the controller first uses the DRAM port to select the row of the memory array that is to be displayed. The VRAM then copies that entire row to an internalrow-buffer which is ashift register. The controller can then continue to use the DRAM port for drawing objects on the display. Meanwhile, the controller feeds a clock called theshift clock (SCLK) to the VRAM's video port. Each SCLK pulse causes the VRAM to deliver the nextdata in strict address order, from the shift register to the video port. For simplicity, the graphics adapter is usually designed so that the contents of a row, and therefore the contents of the shift-register, corresponds to a complete horizontal line on the display.
Through the 1990s, many graphic subsystems used VRAM, with the number of megabits touted as a selling point. In the late 1990s,SDRAM technologies gradually became affordable, dense, and fast enough to displace VRAM, even though it is only single-ported and more overhead is required. Nevertheless, many of the VRAM concepts of internal, on-chip buffering and organization have been used and improved in modern graphics adapters.
