A 64 bit memory chip die, the SP95 Phase 2 buffer memory produced at IBM mid-1960s, versusmemory core iron rings8GBDDR3 RAM stick with a whiteheatsink
Random-access memory (RAM;/ræm/) is a form ofelectronic computer memory that can be read and changed in any order, typically used to store workingdata andmachine code.[1][2] Arandom-access memory device allows data items to beread or written in almost the same amount of time irrespective of the physical location of data inside the memory, in contrast with other direct-access data storage media (such ashard disks andmagnetic tape), where the time required to read and write data items varies significantly depending on their physical locations on the recording medium, due to mechanical limitations such as media rotation speeds and arm movement.
Non-volatile RAM has also been developed[3] and other types ofnon-volatile memories allow random access for read operations, but either do not allow write operations or have other kinds of limitations. These include most types ofROM andNOR flash memory.
The use of semiconductor RAM dates back to 1965 when IBM introduced the monolithic (single-chip) 16-bit SP95 SRAM chip for theirSystem/360 Model 95 computer, andToshiba used bipolar DRAM memory cells for its 180-bit Toscal BC-1411electronic calculator, both based onbipolar transistors. While it offered higher speeds thanmagnetic-core memory, bipolar DRAM could not compete with the lower price of the then-dominant magnetic-core memory.[4] In 1966, Dr.Robert Dennard invented modern DRAM architecture in which there's a single MOS transistor per capacitor.[5] The first commercial DRAM IC chip, the 1KIntel 1103, was introduced in October 1970.Synchronous dynamic random-access memory (SDRAM) was reintroduced with theSamsung KM48SL2000 chip in 1992.
Early computers usedrelays,mechanical counters[6] ordelay lines for main memory functions. Ultrasonic delay lines wereserial devices which could only reproduce data in the order it was written.Drum memory could be expanded at relatively low cost but efficient retrieval of memory items requires knowledge of the physical layout of the drum to optimize speed. Latches built out oftriode vacuum tubes, and later, out ofdiscrete transistors, were used for smaller and faster memories such asregisters. Such registers were relatively large and too costly to use for large amounts of data; generally only a few dozen or few hundred bits of such memory could be provided.
The first practical form of random-access memory was theWilliams tube. It stored data as electrically charged spots on the face of acathode-ray tube. Since the electron beam of the CRT could read and write the spots on the tube in any order, memory was random access. The capacity of the Williams tube was a few hundred to around a thousand bits, but it was much smaller, faster, and more power-efficient than using individual vacuum tube latches. Developed at theUniversity of Manchester in England, the Williams tube provided the medium on which the first electronically stored program was implemented in theManchester Baby computer, which first successfully ran a program on 21 June, 1948.[7] In fact, rather than the Williams tube memory being designed for the Baby, the Baby was atestbed to demonstrate the reliability of the memory.[8][9]
Magnetic-core memory was invented in 1947 and developed up until the mid-1970s. It became a widespread form of random-access memory, relying on an array of magnetized rings. By changing the sense of each ring's magnetization, data could be stored with one bit stored per ring. Since every ring had a combination of address wires to select and read or write it, access to any memory location in any sequence was possible. Magnetic core memory was the standard form ofcomputer memory until displaced bysemiconductor memory inintegrated circuits (ICs) during the early 1970s.[10]
Semiconductor memory appeared in the 1960s with bipolar memory, which usedbipolar transistors. Although it was faster, it could not compete with the lower price of magnetic core memory.[11]
MOS RAM
In 1957, Frosch and Derick manufactured the first silicon dioxide field-effect transistors at Bell Labs, the first transistors in which drain and source were adjacent at the surface.[12] Subsequently, in 1960, a team demonstrated a workingMOSFET at Bell Labs.[13][14] This led to the development ofmetal–oxide–semiconductor (MOS) memory by John Schmidt atFairchild Semiconductor in 1964.[10][15] In addition to higher speeds, MOSsemiconductor memory was cheaper and consumed less power than magnetic core memory.[10] The development ofsilicon-gateMOS integrated circuit (MOS IC) technology byFederico Faggin at Fairchild in 1968 enabled the production of MOSmemory chips.[16] MOS memory overtook magnetic core memory as the dominant memory technology in the early 1970s.[10]
Integrated bipolarstatic random-access memory (SRAM) was invented by Robert H. Norman atFairchild Semiconductor in 1963.[17] It was followed by the development of MOS SRAM by John Schmidt at Fairchild in 1964.[10] SRAM became an alternative to magnetic-core memory, but required six MOS transistors for eachbit of data.[18] Commercial use of SRAM began in 1965, whenIBM introduced the SP95 memory chip for theSystem/360 Model 95.[11]
Dynamic random-access memory (DRAM) allowed replacement of a 4 or 6-transistor latch circuit by a single transistor for each memory bit, greatly increasing memory density at the cost of volatility. Data was stored in the tiny capacitance of each transistor and had to be periodicallyrefreshed every few milliseconds before the charge could leak away.
Toshiba's Toscal BC-1411electronic calculator, which was introduced in 1965,[19][20][21] used a form of capacitor bipolar DRAM, storing 180-bit data on discretememory cells, consisting ofgermanium bipolar transistors and capacitors.[20][21] Capacitors had also been used for earlier memory schemes, such as the drum of theAtanasoff–Berry Computer, theWilliams tube and theSelectron tube. While it offered higher speeds than magnetic-core memory, bipolar DRAM could not compete with the lower price of the then-dominant magnetic-core memory.[22]
In 1966,Robert Dennard, while examining the characteristics of MOS technology, found it was capable of buildingcapacitors, and that storing a charge or no charge on the MOS capacitor could represent the 1 and 0 of a bit, and the MOS transistor could control writing the charge to the capacitor. This led to his development of modern DRAM architecture for which there is a single MOS transistor per capacitor.[18] In 1967, Dennard filed a patent under IBM for a single-transistor DRAM memory cell, based on MOS technology.[18][23] The first commercial DRAM IC chip was theIntel 1103, which wasmanufactured on an8μm MOS process with a capacity of 1kbit, and was released in 1970.[10][24][25]
The earliest DRAMs were often synchronized with the CPU clock (clocked) and were used with early microprocessors. In the mid-1970s, DRAMs moved to the asynchronous design, but in the 1990s returned to synchronous operation.[26][27] In 1992 Samsung released KM48SL2000, which had a capacity of 16Mbit.[28][29] and mass-produced in 1993.[28] The first commercialDDR SDRAM (double data rate SDRAM) memory chip was Samsung's 64Mbit DDR SDRAM chip, released in June 1998.[30]GDDR (graphics DDR) is a form of DDRSGRAM (synchronous graphics RAM), which was first released by Samsung as a 16Mbit memory chip in 1998.[31]
Types
The two widely used forms of modern RAM arestatic RAM (SRAM) anddynamic RAM (DRAM). In SRAM, abit of data is stored using the state of a six-transistormemory cell, typically using six MOSFETs. This form of RAM is more expensive to produce, but is generally faster and requires less dynamic power than DRAM. In modern computers, SRAM is often used ascache memory for the CPU. DRAM stores a bit of data using a transistor andcapacitor pair (typically a MOSFET andMOS capacitor, respectively),[32] which together comprise a DRAM cell. The capacitor holds a high or low charge (1 or 0, respectively), and the transistor acts as a switch that lets the control circuitry on the chip read the capacitor's state of charge or change it. As this form of memory is less expensive to produce than static RAM, it is the predominant form of computer memory used in modern computers.
Both static and dynamic RAM are consideredvolatile, as their state is lost or reset when power is removed from the system. By contrast,read-only memory (ROM) stores data by permanently enabling or disabling selected transistors, such that the memory cannot be altered. Writable variants of ROM (such asEEPROM andNOR flash) share properties of both ROM and RAM, enabling data topersist without power and to be updated without requiring special equipment.ECC memory (which can be either SRAM or DRAM) includes special circuitry to detect and/or correct random faults (memory errors) in the stored data, usingparity bits orerror correction codes.
In general, the termRAM refers solely to solid-state memory devices (either DRAM or SRAM), and more specifically the main memory in most computers. In optical storage, the termDVD-RAM is somewhat of a misnomer since, it is not random access; it behaves much like a hard disc drive if somewhat slower. Aside, unlikeCD-RW orDVD-RW, DVD-RAM does not need to be erased before reuse.
The memory cell is the fundamental building block ofcomputer memory. The memory cell is anelectronic circuit that stores onebit of binary information and it must be set to store a logic 1 (high voltage level) and reset to store a logic 0 (low voltage level). Its value is maintained/stored until it is changed by the set/reset process. The value in the memory cell can be accessed by reading it.
In SRAM, the memory cell is a type offlip-flop circuit, usually implemented usingFETs. This means that SRAM requires very low power when not being accessed, but it is expensive and has low storage density.
A second type, DRAM, is based around a capacitor. Charging and discharging this capacitor can store a "1" or a "0" in the cell. However, the charge in this capacitor slowly leaks away, and must be refreshed periodically. Because of this refresh process, DRAM uses more power, but it can achieve greater storage densities and lower unit costs compared to SRAM.
SRAM cell (6 transistors)
DRAM cell (1 transistor and one capacitor)
Addressing
To be useful, memory cells must be readable and writable. Within the RAM device, multiplexing and demultiplexing circuitry is used to select memory cells. Typically, a RAM device has a set of address lines, and for each combination of bits that may be applied to these lines, a set of memory cells are activated. Due to this addressing, RAM devices virtually always have a memory capacity that is a power of two.
Usually several memory cells share the same address. For example, a 4 bit "wide" RAM chip has four memory cells for each address. Often the width of the memory and that of the microprocessor are different, for a 32 bit microprocessor, eight 4 bit RAM chips would be needed.
Often more addresses are needed than can be provided by a device. In that case, external multiplexors to the device are used to activate the correct device that is being accessed. RAM is often byte addressable, although it is also possible to make RAM that is word-addressable.[33][34]
One can read and over-write data in RAM. Many computer systems have a memory hierarchy consisting ofprocessor registers, on-dieSRAM caches, externalcaches,DRAM,paging systems andvirtual memory orswap space on a hard drive. This entire pool of memory may be referred to as "RAM" by many developers, even though the various subsystems can have very differentaccess times, violating the original concept behind therandom access term in RAM. Even within a hierarchy level such as DRAM, the specific row, column, bank,rank, channel, orinterleave organization of the components make the access time variable, although not to the extent that access time to rotatingstorage media or a tape is variable. The overall goal of using a memory hierarchy is to obtain the fastest possible average access time while minimizing the total cost of the entire memory system (generally, the memory hierarchy follows the access time with the fast CPU registers at the top and the slow hard drive at the bottom).
In many modern personal computers, the RAM comes in an easily upgraded form of modules calledmemory modules or DRAM modules about the size of a few sticks of chewing gum. These can be quickly replaced should they become damaged or when changing needs demand more storage capacity. As suggested above, smaller amounts of RAM (mostly SRAM) are also integrated in theCPU and otherICs on themotherboard, as well as in hard-drives,CD-ROMs, and several other parts of the computer system.
Most modern operating systems employ a method of extending RAM capacity, known as "virtual memory". A portion of the computer'shard drive is set aside for apaging file or ascratch partition, and the combination of physical RAM and the paging file form the system's total memory. (For example, if a computer has 2 GB (10243 B) of RAM and a 1 GB page file, the operating system has 3 GB total memory available to it.) When the system runs low on physical memory, it can "swap" portions of RAM to the paging file to make room for new data, as well as to read previously swapped information back into RAM. Excessive use of this mechanism results inthrashing and generally hampers overall system performance, mainly because hard drives are far slower than RAM.
Software can "partition" a portion of a computer's RAM, allowing it to act as a much faster hard drive that is called aRAM disk. A RAM disk loses the stored data when the computer is shut down, unless memory is arranged to have a standby battery source, or changes to the RAM disk are written out to a nonvolatile disk. The RAM disk is reloaded from the physical disk upon RAM disk initialization.
Shadow RAM
Sometimes, the contents of a relatively slow ROM chip are copied to read/write memory to allow for shorter access times. The ROM chip is then disabled while the initialized memory locations are switched in on the same block of addresses (often write-protected). This process, sometimes calledshadowing, is fairly common in both computers andembedded systems.
As a common example, theBIOS in typical personal computers often has an option called "use shadow BIOS" or similar. When enabled, functions that rely on data from the BIOS's ROM instead use DRAM locations (most can also toggle shadowing of video card ROM or other ROM sections). Depending on the system, this may not result in increased performance, and may cause incompatibilities. For example, some hardware may be inaccessible to theoperating system if shadow RAM is used. On some systems the benefit may be hypothetical because the BIOS is not used after booting in favor of direct hardware access. Free memory is reduced by the size of the shadowed ROMs.[35]
Memory wall
Thememory wall is the growing disparity of speed between CPU and the response time of memory (known asmemory latency) outside the CPU chip. An important reason for this disparity is the limited communication bandwidth beyond chip boundaries, which is also referred to asbandwidth wall. From 1986 to 2000,CPU speed improved at an annual rate of 55% while off-chip memory response time only improved at 10%. Given these trends, it was expected that memory latency would become an overwhelmingbottleneck in computer performance.[36]
Another reason for the disparity is the enormous increase in the size of memory since the start of the PC revolution in the 1980s. Originally, PCs contained less than 1 mebibyte of RAM, which often had a response time of 1 CPU clock cycle, meaning that it required 0 wait states. Larger memory units are inherently slower than smaller ones of the same type, simply because it takes longer for signals to traverse a larger circuit. Constructing a memory unit of many gibibytes with a response time of one clock cycle is difficult or impossible. Today's CPUs often still have a mebibyte of 0 wait state cache memory, but it resides on the same chip as the CPU cores due to the bandwidth limitations of chip-to-chip communication. It must also be constructed from static RAM, which is far more expensive than the dynamic RAM used for larger memories. Static RAM also consumes far more power.
CPU speed improvements slowed significantly partly due to major physical barriers and partly because current CPU designs have already hit the memory wall in some sense.Intel summarized these causes in a 2005 document.[37]
First of all, as chip geometries shrink and clock frequencies rise, the transistorleakage current increases, leading to excess power consumption and heat... Secondly, the advantages of higher clock speeds are in part negated by memory latency, since memory access times have not been able to keep pace with increasing clock frequencies. Third, for certain applications, traditional serial architectures are becoming less efficient as processors get faster (due to the so-calledvon Neumann bottleneck), further undercutting any gains that frequency increases might otherwise buy. In addition, partly due to limitations in the means of producing inductance within solid state devices,resistance-capacitance (RC) delays in signal transmission are growing as feature sizes shrink, imposing an additional bottleneck that frequency increases don't address.
The RC delays in signal transmission were also noted in "Clock Rate versus IPC: The End of the Road for Conventional Microarchitectures"[38] which projected a maximum of 12.5% average annual CPU performance improvement between 2000 and 2014.
A different concept is the processor-memory performance gap, which can be addressed by3D integrated circuits that reduce the distance between the logic and memory aspects that are further apart in a 2D chip.[39] Memory subsystem design requires a focus on the gap, which is widening over time.[40] The main method of bridging the gap is the use ofcaches; small amounts of high-speed memory that houses recent operations and instructions nearby the processor, speeding up the execution of those operations or instructions in cases where they are called upon frequently. Multiple levels of caching have been developed to deal with the widening gap, and the performance of high-speed modern computers relies on evolving caching techniques.[41] There can be up to a 53% difference between the growth in speed of processor and the lagging speed of main memory access.[42]
Solid-state hard drives have continued to increase in speed, from ~400 Mbit/s viaSATA3 in 2012 up to ~7 GB/s viaNVMe/PCIe in 2024, closing the gap between RAM and hard disk speeds, although RAM continues to be an order of magnitude faster, with single-laneDDR5 8000MHz capable of 128 GB/s, and modernGDDR even faster. Fast, cheap,non-volatile solid state drives have replaced some functions formerly performed by RAM, such as holding certain data for immediate availability inserver farms - 1terabyte of SSD storage can be had for $200, while 1 TB of RAM would cost thousands of dollars.[43][44]
^abc"Electronic Design".Electronic Design.41 (15–21). Hayden Publishing Company. 1993.The first commercial synchronous DRAM, the Samsung 16-Mbit KM48SL2000, employs a single-bank architecture that lets system designers easily transition from asynchronous to synchronous systems.
^The term was coined in"Archived copy"(PDF).Archived(PDF) from the original on 2012-04-06. Retrieved2011-12-14.{{cite web}}: CS1 maint: archived copy as title (link).
^Yoshimoto, M.; Anami, K.; Shinohara, H.; Yoshihara, T.; Takagi, H.; Nagao, S.; Kayano, S.; Nakano, T. (1983). "A 64Kb full CMOS RAM with divided word line structure".1983 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. Vol. XXVI. pp. 58–59.doi:10.1109/ISSCC.1983.1156503.S2CID34837669.
^Havemann, Robert H.; Eklund, R. E.; Tran, Hiep V.; Haken, R. A.; Scott, D. B.; Fung, P. K.; Ham, T. E.; Favreau, D. P.; Virkus, R. L. (December 1987). "An 0.8 μm 256K BiCMOS SRAM technology".1987 International Electron Devices Meeting. pp. 841–843.doi:10.1109/IEDM.1987.191564.S2CID40375699.
^"Japanese Technical Abstracts".Japanese Technical Abstracts.2 (3–4). University Microfilms: 161. 1987.The announcement of 1M DRAM in 1984 began the era of megabytes.
^abRobinson, Arthur L. (11 May 1984). "Experimental Memory Chips Reach 1 Megabit: As they become larger, memories become an increasingly important part of the integrated circuit business, technologically and economically".Science.224 (4649):590–592.doi:10.1126/science.224.4649.590.ISSN0036-8075.PMID17838349.
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