S1 Core (codenameSirocco) is anopen source hardwaremicroprocessor design developed by Simply RISC. Based onSun Microsystems'UltraSPARC T1, the S1 Core is licensed under theGNU General Public License, which is the license Sun chose for theOpenSPARC project.

The main goal of the project is to keep the S1 Core as simple as possible to encourage developers. The major differences between T1 and S1 include:

• S1 Core only has one 64-bitSPARC Core (supporting one to four independent threads of execution) instead of eight cores;
• S1 Core adds aWishbone bridge, a reset controller and a basicinterrupt controller;
• the S1 Core environment can be run using only free tools on a common x86 Linux machine.

• LEON
• OpenRISC

• Simply RISC - S1 Core (archive.org link - as of 2018/11/5 original url redirects to OpenPiton)
• OpenPiton Simply RISC site redirects to here, as of 2018/11/5, it is unclear if it is related.
• S1 Core page on OpenCores
• S1 Core page on SunSource

Thismicrocomputer- ormicroprocessor-related article is astub. You can help Wikipedia byexpanding it.

• v
• t
• e

Thiscomputer hardware article is astub. You can help Wikipedia byexpanding it.

• v
• t
• e

• Open microprocessors
• SPARC microprocessors
• Microcomputer stubs
• Computer hardware stubs

• All stub articles