
In computer science, aparallel external memory (PEM) model is acache-aware, external-memoryabstract machine.[1] It is the parallel-computing analogy to the single-processorexternal memory (EM) model. In a similar way, it is the cache-aware analogy to theparallel random-access machine (PRAM). The PEM model consists of a number of processors, together with their respective private caches and a shared main memory.
The PEM model[1] is a combination of the EM model and the PRAM model. The PEM model is a computation model which consists of processors and a two-levelmemory hierarchy. This memory hierarchy consists of a large external memory (main memory) of size and small internal memories (caches). The processors share the main memory. Each cache is exclusive to a single processor. A processor can't access another’s cache. The caches have a size which is partitioned in blocks of size. The processors can only perform operations on data which are in their cache. The data can be transferred between the main memory and the cache in blocks of size.
The complexity measure of the PEM model is the I/O complexity,[1] which determines the number of parallel blocks transfers between the main memory and the cache. During a parallel block transfer each processor can transfer a block. So if processors load parallelly a data block of size form the main memory into their caches, it is considered as an I/O complexity of not. A program in the PEM model should minimize the data transfer between main memory and caches and operate as much as possible on the data in the caches.
In the PEM model, there is no direct communication network between the P processors. The processors have to communicate indirectly over the main memory. If multiple processors try to access the same block in main memory concurrently read/write conflicts[1] occur. Like in the PRAM model, three different variations of this problem are considered:
The following two algorithms[1] solve the CREW and EREW problem if processors write to the same block simultaneously.A first approach is to serialize the write operations. Only one processor after the other writes to the block. This results in a total of parallel block transfers. A second approach needs parallel block transfers and an additional block for each processor. The main idea is to schedule the write operations in a binary tree fashion and gradually combine the data into a single block. In the first round processors combine their blocks into blocks. Then processors combine the blocks into. This procedure is continued until all the data is combined in one block.
| Model | Multi-core | Cache-aware |
|---|---|---|
| Random-access machine (RAM) | No | No |
| Parallel random-access machine (PRAM) | Yes | No |
| External memory (EM) | No | Yes |
| Parallel external memory (PEM) | Yes | Yes |
Let be a vector of d-1 pivots sorted in increasing order. LetA be an unordered set of N elements. A d-way partition[1] ofA is a set , where and for. is called the i-th bucket. The number of elements in is greater than and smaller than. In the following algorithm[1] the input is partitioned into N/P-sized contiguous segments in main memory. The processor i primarily works on the segment. The multiway partitioning algorithm (PEM_DIST_SORT[1]) uses a PEMprefix sum algorithm[1] to calculate the prefix sum with the optimal I/O complexity. This algorithm simulates an optimal PRAM prefix sum algorithm.
// Compute parallelly a d-way partition on the data segmentsfor each processor iin parallel do Read the vector of pivotsM into the cache. Partition into d buckets and let vector be the number of items in each bucket.end forRun PEM prefix sum on the set of vectors simultaneously.// Use the prefix sum vector to compute the final partitionfor each processor iin parallel do Write elements into memory locations offset appropriately by and.end forUsing the prefix sums stored in the last processor P calculates the vectorB of bucket sizes and returns it.
If the vector of pivots M and the input set A are located in contiguous memory, then the d-way partitioning problem can be solved in the PEM model with I/O complexity. The content of the final buckets have to be located in contiguous memory.
Theselection problem is about finding the k-th smallest item in an unordered listA of sizeN.The following code[1] makes use ofPRAMSORT which is a PRAM optimal sorting algorithm which runs in, andSELECT, which is a cache optimal single-processor selection algorithm.
ifthenreturnend if //Find median of eachfor each processoriin parallel doend for // Sort medians// Partition around median of mediansifthenreturnelsereturnend if
Under the assumption that the input is stored in contiguous memory,PEMSELECT has an I/O complexity of:
Distribution sort partitions an input listA of sizeN intod disjoint buckets of similar size. Every bucket is then sorted recursively and the results are combined into a fully sorted list.
If the task is delegated to a cache-optimal single-processor sorting algorithm.
Otherwise the following algorithm[1] is used:
// Sample elements fromAforeach processoriin parallel doifthen Load inM-sized pages and sort pages individuallyelse Load and sort as single pageend if Pick every'th element from each sorted memory page into contiguous vector of samplesend forin parallel do Combine vectors into a single contiguous vector Make copies of:end do// Find pivotsfor toin parallel doend forPack pivots in contiguous array// PartitionAaround pivots into buckets// Recursively sort bucketsfor toin parallel do recursively call on bucketjof size using processors responsible for elements in bucketjend for
The I/O complexity ofPEMDISTSORT is:
where
If the number of processors is chosen thatand the I/O complexity is then:
| PEM Algorithm | I/O complexity | Constraints |
|---|---|---|
| Mergesort[1] | ||
| List ranking[2] | ||
| Euler tour[2] | ||
| Expression tree evaluation[2] | ||
| Finding aMST[2] |
Where is the time it takes to sortN items withP processors in the PEM model.