p–n junction isolation is a method used to electrically isolateelectronic components, such astransistors, on anintegrated circuit (IC) by surrounding the components withreverse biasedp–n junctions.
By surrounding a transistor, resistor, capacitor or other component on an IC with semiconductor material which is doped using an opposite species of the substratedopant, and connecting this surrounding material to a voltage which reverse-biases thep–n junction that forms, it is possible to create a region which forms an electrically isolated "well" around the component.
Assume that thesemiconductor wafer isp-type material. Also assume a ring ofn-type material is placed around a transistor, and placed beneath the transistor. If the p-type material within the n-type ring is now connected to thenegative terminal of the power supply and the n-type ring is connected to thepositive terminal, the 'holes' in the p-type region are pulled away from the p–n junction, causing the width of thenonconductingdepletion region to increase. Similarly, because the n-type region is connected to the positive terminal, the electrons will also be pulled away from the junction.
This effectively increases thepotential barrier and greatly increases theelectrical resistance against the flow ofcharge carriers. For this reason there will be no (or minimal)electric current across the junction.
At the middle of the junction of the p–n material, adepletion region is created to stand-off the reverse voltage. The width of thedepletion region grows larger with higher voltage. The electric field grows as the reverse voltage increases. When the electric field increases beyond a critical level, the junction breaks down and current begins to flow byavalanche breakdown. Therefore, care must be taken that circuit voltages do not exceed the breakdown voltage or electrical isolation ceases.
In an article entitled "Microelectronics", published inScientific American, September 1977 Volume 23, Number 3, pp. 63–9, Robert Noyce wrote:
"The integrated circuit, as we conceived and developed it at Fairchild Semiconductor in 1959, accomplishes the separation and interconnection of transistors and other circuit elements electrically rather than physically. The separation is accomplished by introducing pn diodes, or rectifiers, which allow current to flow in only one direction. The technique was patented by Kurt Lehovec at the Sprague Electric Company".
Sprague Electric Company engineerKurt Lehovec filedU.S. patent 3,029,366 for p–n junction isolation in 1959, and was granted the patent in 1962. He is reported (during his lectures on semiconductor memory cells) to have said "I never got a dime out of it [the patent]." However, I T Historystates he was paid (pro forma) at least one dollar for what is possibly the most important invention in history, as it also was instrumental in the invention of theLED and thesolar cell, both of which Lau Wai Shing says Lehovec alsopioneered the research of.
WhenRobert Noyce invented themonolithic integrated circuit in 1959, his idea of p–n junction isolation was based on Hoerni's planar process.[1] In 1976, Noyce stated that, in January 1959, he did not know about the work of Lehovec.[2]