ASHA instruction set is a set of extensions to thex86 andARMinstruction set architecture which supporthardware acceleration ofSecure Hash Algorithm (SHA) family. It was specified in 2013 by Intel.^[1] Instructions forSHA-512 was introduced inArrow Lake andLunar Lake in 2024.

The originalSSE-based extensions added four instructions supportingSHA-1 and three forSHA-256.

• SHA-1:SHA1RNDS4,SHA1NEXTE,SHA1MSG1,SHA1MSG2
• SHA-256:SHA256RNDS2,SHA256MSG1,SHA256MSG2

The newer SHA-512 instruction set comprisesAVX-based versions of the original SHAinstruction set marked with aV prefix and these three new AVX-based instructions forSHA-512:

• VSHA512RNDS2,VSHA512MSG1,VSHA512MSG2

All recent AMD processors support the original SHA instruction set:

• AMDZen^[2] (2017) and later processors.

The following Intel processors support the original SHA instruction set:

• IntelGoldmont^[3] (2016) and later Atom microarchitecture processors.
• IntelCannon Lake^[4] (2018/2019),Ice Lake^[5] (2019) and later processors for laptops ("mainstream mobile").
• IntelRocket Lake (2021) and later processors for desktop computers.

The following Intel processors will support the newer SHA-512 instruction set:

• IntelArrow Lake andLunar Lake processors.

• Chapter 8 of"Intel Architecture Instruction Set Extensions Programming Reference"(PDF). Archived fromthe original(PDF) on 2013-09-29.

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