Movatterモバイル変換


[0]ホーム

URL:


Jump to content
WikipediaThe Free Encyclopedia
Search

Intel MCS-48

From Wikipedia, the free encyclopedia
Family of 8-bit microcontrollers
Intel 8048microcontroller
The 8749 with UV EPROM
An Intel 8049 microcontroller, as used in a HP3478A multimeter. This chip was manufactured in the second week of 1984.
Intel 8749die
Intel 8048 registers[1]
09080706050403020100(bit position)
Main registers
 AAccumulator
PCProgram Counter
Timer/Counter
 TTimer
Program Status Word
 CYACF0BS1Stack
Flags
 DBFF1I
Note: All other programmer-visible registers and stack are allocated in RAM.

TheMCS-48microcontroller series,Intel's first microcontroller, was originally released in 1976. Its first members were8048,8035 and8748. The 8048[2] is arguably the most prominent member of the family. Initially, this family was produced usingNMOS (n-typemetal–oxide–semiconductor) technology. In the early 1980s, it became available inCMOS technology. It was manufactured into the 1990s to support older designs that still used it.

The MCS-48 series has amodified Harvard architecture, with internal or external programROM and 64 to 256 bytes of internal (on-chip)RAM. TheI/O is mapped into its ownaddress space, separate from programs and data.

Though the MCS-48 series was eventually replaced by the very successfulMCS-51 series, it remained quite popular even by the year 2000 due to its low cost, wide availability, memory-efficient one-byte instruction set, and mature development tools. Because of this, it is used in high-volume, cost-sensitive consumer electronics devices such as TV remotes, computer keyboards, and toys.

Variants

[edit]

The8049 has 2 KB of maskedROM (the 8748 and 8749 hadEPROM) that can be replaced with a 4 KB external ROM, as well as 128 bytes ofRAM and 27 I/O ports.[3] The microcontroller'soscillator block divides the clock input frequency by three and then further divides the result into five machine states. Using the 11 MHz maximum crystal frequency will produce 0.73 MIPS of single-cycleinstructions. Some 70% of instructions are single byte and single cycle ones, but 30% need two cycles or two bytes, so its typical performance would be closer to 0.5 MIPS.

Microcontroller[1]
DeviceProgram memoryData memoryRemarks
80201K × 8 ROM64 × 8 RAMsubset of 8048, 20 pins, only 13 I/O lines
80211K × 8 ROM64 × 8 RAMsubset of 8048, 28 pins, 21 I/O lines
80222K × 8 ROM64 × 8 RAMsubset of 8048, A/D-converter
8035none64 × 8 RAM
8038none64 × 8 RAM
8039none128 × 8 RAM
8040none256 × 8 RAM
80481K × 8 ROM64 × 8 RAM27× I/O ports
80492K × 8 ROM128 × 8 RAM27× I/O ports
80504K x 8 ROM256 × 8 RAM
86481K × 8 OTP EPROM64 × 8 RAMFactory OTP EPROM
87481K × 8 EPROM[4]64 × 8 RAM[4]4K program memory expandable,[4] 2× 8-bit timers, 27× I/O ports
87492K × 8 EPROM128 × 8 RAM2× 8-bit timers, 27× I/O ports
87P50ext. ROM socket256 × 8 RAMHaspiggy-back socket for 2758/2716/2732 EPROM
Intel P8242 - keyboard controller with Phoenix firmware for AT-compatible computers
National Semiconductor NS87P50D-6 –Second source for the 87P50piggyback microcontroller
Universal Peripheral Interface
DeviceProgram memoryData memoryRemarks
80411K × 8 ROM64 × 8 RAMUniversal Peripheral Interface (UPI)
8041AH1K × 8 ROM128 × 8 RAMUPI
8741A1K × 8 EPROM64 × 8 RAMUPI, EPROM version of 8041
8741AH1K × 8 OTP EPROM128 × 8 RAMUPI, OTP EPROM version of 8041AH
8042AH2K × 8 ROM256 × 8 RAMUPI
82422K × 8 ROM256 × 8 RAMUPI, preprogrammed with keyboard controller firmware[5]
87422K × 8 EPROM128 × 8 RAMUPI, EPROM version
8742AH2K × 8 OTP EPROM256 × 8 RAMUPI, OTP EPROM version of 8042AH

Uses

[edit]

The MCS-48 series was commonly used in computer and terminal keyboards, converting key presses into protocols that can be understood by digital circuits. This also allows the possibility of serial communication, reducing the number of conductors needed in cables on external keyboards. Microprocessors had been used in keyboards since at least 1972, simplifying earlier discrete designs. The 8048 has been used in this application since its introduction in 1978.[citation needed]

The Tandy/Radio ShackTRS-80 Model II, released in 1979, used the 8021 in its keyboard.[6] The 8021 processor scans the key matrix, converts switch closures to an 8-bit code and then transmits that code serially to the keyboard interface on the main system. It will also accept commands to turn indicator LEDs on or off. The 8021 was also used in the keyboards for the TRS-80 Model 12, 12B, 16, 16B and the Tandy 6000/6000HD.[7]

The originalIBM PC keyboard and the keyboard for its precursor theIBM System/23 Datamaster used an 8048 as its internalmicrocontroller.[8] ThePC AT replaced the PC'sIntel 8255 peripheral interface chip at I/O port addresses0x60–63 with an 8042 accessible through port addresses0x60 and0x64.[9] As well as managing the keyboard interface, the 8042 controlled theA20 line gating function for the AT'sIntel 80286 CPU and could be commanded by software to reset the 80286 (unlike the80386 and later processors, the 80286 had no way of switching fromprotected mode back toreal mode except by being reset). Later PC compatibles integrate the 8042's functions into theirsuper I/O devices.

The 8048 was used in theMagnavox Odyssey²video game console, theKorg Trident series,[10] and theKorg Poly-61,[11]Roland Jupiter-4 andRoland ProMars[12]analog synthesizers. TheSinclair QL used the closely related Intel 8049 to manage its keyboard, joystick ports, RS-232 inputs and audio. The ROM-less 8035 variant was used inNintendo's arcade gameDonkey Kong to generate the background music and some of the game's sound effects.

Instruction set

[edit]

All MCS-48 instructions are one or two bytes long with 70% of the instructions being one byte. The MCS-48 can address 4096 bytes of program memory, 256 bytes of RAM, and eight port I/O addresses. Most arithmetic and logical operations use the accumulator as a parameter and destination. Eight memory locations are mapped as registers so they can be addressed by a 3-bit field embedded in many instructions. Two of those registers can be used as memory pointers. Conditional branches can only access the current 256-byte page. JMP and CALL can directly access 2048 locations. To access the entire 4096 byte program space, a clunky select memory bank instruction must be used. The RET instruction can, however, return anywhere in the address space. Interrupts are well supported with alternate registers for quick context switches and the ability to restore the state of the flags with the RETR instruction. All instructions execute in one or two machine cycles. Each machine cycle takes 15 external clocks.[1]

OpcodeOperandMnemonicCyclesDescription
76543210
00000000NOP1No operation
00000010OUTL BUS,A2Bus latch ← A
ALUI0011dataADD ADDC MOV ORL ANL XRL2A ← A ALU #
addhi00100addloJMP add2PC ← DBF:addhi:addlo
000I0101EN/DIS I1I ← 0 (EN) or I ← 1 (DIS)
00000111DEC A1A ← A - 1
00001000INS A,BUS2A ← bus
000010PPIN A,Pp2A ← Port(p) (Ports 1-2)
00001PPMOVD A,Pp2A0-3 ← 8243 Port(p); A4-7 ← 0 (Ports 4-7)
ALU000RINC XCH ORL ANL ADD ADDC
MOVaA XRL MOVAa
1dest ← dest ALU @Rr (@R0, @R1 only; no DEC)
ALU1RRRINC XCH ORL ANL ADD ADDC
MOVaA DEC XRL MOVAa
1dest ← dest ALU Rr
BIT10010addrJBb addr2If A ∧ (1 << b) then PC0-7 ← addr
addhi10100addloCALL add2(SP) ← PSW4-7:PC; SP ← SP + 1; PC ← DBF:addhi:addlo
00010110addrJTF addr2If TF = 1 then PC0-7 ← addr (timer flag set)
00010111INC A1A ← A + 1
001T0101EN/DIS TCNTI1TCNTI ← 0 (EN) or TCNTI ← 1 (DIS) (timer/counter interrupt)
001F0110addrJNT0 JT0 addr2If F = T0 then PC0-7 ← addr (test input 0)
00100111CLR A1A ← 0
00110111CPL A1A ← ¬A
001110PPOUTL Pp,A2Port(p) ← A (Ports 1-2)
00111PPMOVD Pp,A28243 Port(p) ← A0-3 (Ports 4-7)
01000010MOV A,T1A ← T (Move timer to A)
010T0101STRT CNT/T1If T = 0 start count else start timer
010F0110addrJNT1 JT1 addr2If F = T1 then PC0-7 ← addr (test input 1)
01000111SWAP A1A0-3 ↔ A4-7
01010111DA A1If A0-4 > 9 OR AC = 1 then A ← A + 6;

then if A4-7 > 9 OR C = 1 then A ← A + 0x60

01100010MOV T,A1T ← A (Move A to timer)
01100101STOP TCNT1Stop timer and count
01100111RRC A1C ← A0; A0-6 ← A1-7; A7 ← C
01110101ENT0 CLK1Set T0 as a clock output
01110110addrJF1 addr2If F1 = 1 then PC0-7 ← addr
01110111RR A1A0-6 ← A1-7; A7 ← A0
10000011RET2SP ← SP - 1; PC ← (SP)
10N00101CLR Fn1Fn ← 0
10000110addrJNI addr2If I input = 0 then PC0-7 ← addr (test interrupt input low)
10001000dataORL BUS,#2A ← bus ∨ #
100010PPdataORL Pp,#2A ← Port(p) ∨ # (Ports 1-2)
10001PPORLD Pp,A28243 Port(p) ← 8243 Port(p) ∨ A0-3 (Ports 4-7)
10010011RETR2SP ← SP - 1; PC ← (SP); PSW4-7 ← (SP)
10N10101CPL Fn1Fn ← ¬Fn
10010111CLR C1C ← 0
10011000dataANL BUS,#2A ← bus ∧ #
100110PPdataANL Pp,#2A ← Port(p) ∧ # (Ports 1-2)
10011PPANLD Pp,A28243 Port(p) ← 8243 Port(p) ∧ A0-3 (Ports 4-7)
10100011MOVP A,@A2A ← ROM(PC8-11:A) (read program memory)
10100111CPL C1C ← ¬C
10110011JMPP @A2PC0-7 ← A (indirect JMP)
10110110addrJF0 addr2If F0 = 1 then PC0-7 ← addr
110N0101SEL RBn1BS ← n (select register bank)
11000110addrJZ addr2If A = 0 then PC0-7 ← addr
11000111MOV A,PSW1A ← PSW
11010111MOV PSW,A1PSW ← A
11100011MOVP3 A,@A2A ← ROM(0011:A) (read page 3 program memory)
111N0101SEL MBn1DBF ← n (select memory bank: PC11)
111F0110addrJNC JC addr2If F = C then PC0-7 ← addr
11100111RL A1A1-7 ← A0-6; A0 ← A7
11101RRRaddrDJNZ Rr,addr2Rr ← Rr - 1; If Rr ≠ 0 then PC0-7 ← addr
11110111RLC A1C ← A7; A1-7 ← A0-6; A0 ← C
76543210OperandMnemonicCyclesDescription
RRR or R3210ALUALUI #immed
R0 @R00000ADD A,# (A ← A + #)
R1 @R10001INC arg (arg ← arg + 1)ADDC A,# (A ← A + # + C)
R20010XCH A,arg (A ↔ arg)MOV R,# (R ← #)
R30011
R40100ORL A,arg (A ← A ∨ arg)ORL A,# (A ← A ∨ #)
R50101ANL A,arg (A ← A ∧ arg)ANL A,# (A ← A ∧ #)
R60110ADD A,arg (A ← A + arg)
R70111ADDC A,arg (A ← A + arg + C)
1010MOV arg,A (arg ← A)
1100DEC arg (arg ← arg - 1)
1101XRL A,arg (A ← A ⊻ arg)XRL A,# (A ← A ⊻ #)
1111MOV A,arg (A ← arg)
RRR or R3210ALUALUI #immed

Example code

[edit]

The followingassembler source code is for a subroutine namedadd32 that adds two 32-bit integers stored inlittle endian order. One addend is pointed to by R0 and the other addend and result are pointed to by R1.

         100100  BA 04102  97103  F0104  71105  A1106  18107  19108  EA 0310A  8310B
; Add32 --; Add two 32-bit integers;; Entry registers;       R0 - Address of first addend;       R1 - Address of second addend and result; Altered registers;       R0, R1, R2ORG100h;Origin at 1000hADD32:MOVR2,#32./8.  ;number of bytes in 32 bitsCLRC;prepare for ADDCADDLP:MOVA,@R0;Get first addendADDCA,@R1;Add second addend + CYMOV@R1,A;Store resultINCR0;Bump memory pointersINCR1DJNZR2,ADDLP;Loop R2 timesRETEND

Derived microcontrollers

[edit]

Philips Semiconductors (nowNXP) owned a license to produce this series and developed their MAB8400-family based on this architecture. These were the first microcontrollers with an integratedI²C-interface and were used in the firstPhilips (Magnavox in the US)Compact Disc players (e.g. the CD-100).[13]

See also

[edit]

References

[edit]
  1. ^abcMCS-48 Family of Single Chip Microcomputers User's Manual(PDF) (AFN·01300A-1 ed.). Intel. September 1980. Retrieved15 November 2025.
  2. ^Laws, David; Blume Jr., Henry; Ekiss, John; Feng, Yung; Kline, Barbara; Raphael, Howard; Stamm, David (2008-07-30).Oral History Panel on the Development and Promotion of the Intel 8048 Microcontroller(PDF). Archived fromthe original(PDF) on 2014-12-27.
  3. ^Intel Corporation 1978.
  4. ^abcHayes, John P. (1978).Computer Architecture and Organization. McGraw-Hill International Book Company. pp. 57–59.ISBN 0-07-027363-4.
  5. ^"UPI-41AH/42AH Universal Peripheral Interface 8-bit Slave Microcontroller"(PDF). Intel. November 1994. p. 2. Retrieved2022-07-19.
  6. ^TRS-80 Model II Technical Reference Manual. Radio Shack. p. 135.
  7. ^Tandy 6000/6000HD Service Manual. Tandy/Radio Shack. 1985. p. 213.
  8. ^"Section 4: Keyboard",Technical Reference: Personal Computer, Personal Computer Hardware Reference Library (Revised ed.),IBM, April 1984
  9. ^"Section 1: System Board",Technical Reference: Personal Computer AT, Personal Computer Hardware Reference Library, IBM, September 1985
  10. ^"Korg Trident Service Manual". Korg. p. 4. Retrieved10 February 2018 – via Synthfool.
  11. ^"Korg Poly-61 Service Manual"(PDF). Archived fromthe original(PDF) on 2010-06-02. Retrieved2013-03-07.
  12. ^Gordon Reid (November 2004)."The History Of Roland, Part 1: 1930–1978".The History Of Roland. Sound On Sound Magazine. Retrieved29 November 2010.
  13. ^Datasheet (pdf) Philips MAB8400-Family

Bibliography

[edit]
MCS-48
UPI-41

External links

[edit]
Main
Architectures
Word length
4-bit
8-bit
16-bit
32-bit
64-bit
Interfaces
Programming
Debugging
Lists
See also
Authority control databases: NationalEdit this at Wikidata
Retrieved from "https://en.wikipedia.org/w/index.php?title=Intel_MCS-48&oldid=1323467720"
Categories:
Hidden categories:

[8]ページ先頭

©2009-2025 Movatter.jp