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| Input A B | Output A → B | |
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
TheIMPLY gate is a digitallogic gate that implements alogical conditional.[1]
IMPLY can be denoted in algebraic expressions with thelogic symbol right-facing arrow (→). Logically, it is equivalent tomaterial implication, and the logical expression ¬A v B.
There are two symbols for IMPLY gates: the traditional symbol and theIEEE symbol. For more information seeLogic gate symbols.
 |  | |
| Traditional IMPLY Symbol | IEEE IMPLY Symbol |
While the Implication gate is notfunctionally complete by itself, it is in conjunction with the constant 0 source. This can be shown via the following:
Thus, since the implication gate with the addition of the constant 0 source can create both the NOT gate and the OR gate, it can create the NOR gate, which is a universal gate.
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