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Gracemont (microarchitecture)

From Wikipedia, the free encyclopedia
CPU microarchitecture by Intel

Gracemont
General information
LaunchedNovember 4, 2021; 4 years ago (2021-11-04)[1]
Marketed byIntel
Designed byIntel
Common manufacturer
  • Intel
Performance
Max.CPUclock rate0.7 GHz to 4.3 GHz
Cache
L1cache96 KB per core:
  • 64 KB instructions
  • 32 KB data
L2 cache2 or 4 MB per module
L3 cache3 MB per module
Architecture and classification
Instruction setx86-64
Extensions
Physical specifications
Cores
  • 4 per module
Products, models, variants
Product code names
History
PredecessorTremont
SuccessorCrestmont

Gracemont is amicroarchitecture for low-power processors used insystems on a chip (SoCs) made byIntel, and is the successor toTremont. Like its predecessor, it is also implemented as low-power cores in a hybrid design of theAlder Lake,Raptor Lake and Raptor Lake Refresh processors.[2]

Design

[edit]

Gracemont is the fourth generationout-of-order low-powerAtom microarchitecture, built on theIntel 7 manufacturing process.[3]

The Gracemont microarchitecture has the following enhancements overTremont:[4][3]

  • Level 1 cache per core:
    • eight-way-associative 64 KB instruction cache
    • eight-way-associative 32 KB data cache
  • New On-Demand Instruction Length Decoder
  • Instruction issue increased to five per clock (from four)
  • Instruction retire increased to eight per clock (from seven)
  • Execution ports (functional units) there are now 17 (from ten)
  • Reorder buffer increased to 256 entries (from 208)
  • Improved branch prediction
  • Support forAVX,AVX2,FMA3 andAVX-VNNI instructions[5]
  • 2 or 4 MB sharedL2 cache per 4-core cluster[3] Alder Lake-S/H/P/U family has 2 MB. Raptor Lake-S/H/P/U family has 4 MB.

Technology

[edit]

List of Gracemont processors

[edit]
Main articles:Alder Lake andRaptor Lake

The microarchitecture is used as the efficient cores of the 12th generation of Intel Core hybrid processors (codenamed "Alder Lake"), the 13th generation of Intel Core hybrid processors (codenamed "Raptor Lake") and the 14th generation of Intel Core hybrid processors (codenamed "Raptor Lake Refresh"). It's also used in theAlder Lake-N line-up as the only core cluster, intended for low-power applications.

Alder Lake-N

[edit]
BrandingModelCores
(threads)
Clock rate (GHz)GPUCacheTDPRelease datePrice
(USD)[a]
BaseTurboModelEUsClock rate
(GHz)
L2L3BasecTDP
Down
BaseTurbo
Core
i3
N3058 (8)1.83.8UHD
Graphics
32?1.252 MB6 MB15 W9 WJan 3, 2023$309
N3001.17 W
Intel
Processor
N2004 (4)0.83.70.756 W$193
N1000.83.424$128
N972.03.60.851.212 W$128
N951.73.416?15 W?
N502 (2)1.03.40.60.756 W$128
Atomx7425E4 (4)1.5240.81.012 W$58
x7213E2 (2)1.73.21610 W$47
x7211E1.00.66 W$39
  1. ^Price is Recommended Customer Price (RCP) at launch. RCP is the trade price that processors are sold by Intel to retailers and OEMs. Actual MSRP for consumers is higher.

See also

[edit]

References

[edit]
  1. ^Cutress, Ian (October 27, 2021)."Intel 12th Gen Core Alder Lake for Desktops: Top SKUs Only, Coming November 4th".AnandTech. Archived fromthe original on October 27, 2021. RetrievedSeptember 14, 2022.
  2. ^Cutress, Ian (August 14, 2020)."Intel Alder Lake: Confirmed x86 Hybrid with Golden Cove and Gracemont for 2021".AnandTech. Archived fromthe original on August 14, 2020. RetrievedSeptember 14, 2022.
  3. ^abcCutress, Ian; Frumusanu, Andrei (August 19, 2021)."Intel Architecture Day 2021: Alder Lake, Golden Cove, and Gracemont Detailed".AnandTech. Archived fromthe original on August 19, 2021. RetrievedAugust 31, 2022.
  4. ^"Gracemont – Microarchitectures – Intel".WikiChip. RetrievedSeptember 14, 2022.
  5. ^Shilov, Anton (October 7, 2020)."Intel's Upcoming Gracemont Microarchitecture to Support AVX, AVX2, and AVX-VNNI".Tom's Hardware. RetrievedSeptember 14, 2022.
Lists
Microarchitectures
IA-32 (32-bit x86)
x86-64 (64-bit)
x86ULV
Current products
x86-64 (64-bit)
Discontinued
BCD oriented (4-bit)
pre-x86 (8-bit)
Earlyx86 (16-bit)
x87 (externalFPUs)
8/16-bit databus
8087 (1980)
16-bit databus
80C187
80287
80387SX
32-bit databus
80387DX
80487
IA-32 (32-bit x86)
x86-64 (64-bit)
Other
Related
Intel CPU core roadmaps fromP6 to Panther Lake
Atom (ULV)Node namePentium/Core
Microarch.StepMicroarch.Step
600 nmP6Pentium Pro
(133 MHz)
500 nmPentium Pro
(150 MHz)
350 nmPentium Pro
(166–200 MHz)
Klamath
250 nmDeschutes
KatmaiNetBurst
180 nmCoppermineWillamette
130 nmTualatinNorthwood
Pentium MBaniasNetBurst(HT)NetBurst(×2)
90 nmDothanPrescottPrescott‑2MSmithfield
TejasCedarmill (Tejas)
65 nmYonahNehalem (NetBurst)Cedar MillPresler
CoreMerom4 cores on mainstream desktop,DDR3 introduced
BonnellBonnell45 nmPenryn
NehalemNehalemHT reintroduced, integratedMC, PCH
L3-cache introduced, 256 KB L2-cache/core
Saltwell32 nmWestmereIntroduced GPU on same package andAES-NI
Sandy BridgeSandy BridgeOn-die ring bus, no more non-UEFI motherboards
SilvermontSilvermont22 nmIvy Bridge
HaswellHaswellFully integrated voltage regulator
Airmont14 nmBroadwell
SkylakeSkylakeDDR4 introduced on mainstream desktop
GoldmontGoldmontKaby Lake
Coffee Lake6 cores on mainstream desktop
Amber LakeMobile-only
Goldmont PlusGoldmont PlusWhiskey LakeMobile-only
Coffee Lake Refresh8 cores on mainstream desktop
Comet Lake10 cores on mainstream desktop
Sunny CoveCypress Cove (Rocket Lake)Backported Sunny Cove microarchitecture for 14 nm
TremontTremont10 nmSkylakePalm Cove (Cannon Lake)Mobile-only
Sunny CoveSunny Cove (Ice Lake)512 KB L2-cache/core
Willow Cove (Tiger Lake)Xe graphics engine
GracemontGracemontIntel 7
(10 nm ESF)
Golden CoveGolden Cove (Alder Lake)Hybrid, DDR5, PCIe 5.0
Raptor Cove (Raptor Lake)
CrestmontCrestmontIntel 4Redwood CoveMeteor LakeMobile-only
NPU,chiplet architecture
Intel 3Arrow Lake-U
SkymontSkymontN3B (TSMC)Lion CoveLunar LakeLow power mobile only (9–30 W)
Arrow Lake
DarkmontDarkmontIntel 18ACougar CovePanther Lake
  • Strike-through indicates cancelled processors
  • Bold names are microarchitectures
  • Italic names are future processors
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