Integrated device containing configurable analog blocks and interconnects between these blocks
Afield-programmable analog array (FPAA) is anintegrated circuit device containing computationalanalog blocks (CABs)[1][2] and interconnects between these blocks offeringfield-programmability. Unlike theirdigital cousin, theFPGA, the devices tend to be more application driven than general purpose as they may becurrent mode or voltage mode devices. For voltage mode devices, each block usually contains anoperational amplifier in combination with programmable configuration of passive components. The blocks can, for example, act assummers orintegrators.
Discrete-time devices possess asystem sample clock. In aswitched capacitor design, all blocks sample their input signals with asample and hold circuit composed of a semiconductor switch and a capacitor. This feeds a programmableop amp section which can be routed to a number of other blocks. This design requires more complexsemiconductor construction. An alternative, switched-current design, offers simpler construction and does not require the input capacitor, but can be less accurate, and has lowerfan-out - it can drive only one following block. Both discrete-time device types must compensate for switching noise, aliasing at the system sample rate, and sample-rate limited bandwidth, during the design phase.
Continuous-time devices work more like an array oftransistors or op amps which can operate at their fullbandwidth. The components are connected in a particular arrangement through a configurable array of switches. Duringcircuit design, the switch matrix'sparasitic inductance, capacitance andnoise contributions must be taken into account.
Currently there are very few manufactures of FPAAs. On-chip resources are still very limited when compared to that of an FPGA. This resource deficit is often cited by researchers as a limiting factor in their research.
The termFPAA was first used in 1991 by Lee and Gulak.[3] They put forward the concept of CABs that are connected via a routing network and configured digitally. Subsequently, in 1992[citation needed] and 1995[4] they further elaborated the concept with the inclusion of op-amps, capacitors, and resistors. This original chip was manufactured using 1.2 μm CMOS technology and operates in the 20 kHz range at a power consumption of 80 mW.
However, the concept of a user-definable analog array dates back 20 years earlier, to the mask-programmable analog "Monochip" invented by the designer of the famous 555 timer chip, Hans Camenzind, and his company Interdesign (later acquired by Ferranti in 1977). The Monochip was the basis for a pioneering line of chips for music synthesizers, sold by Curtis Electromusic (CEM).[5][6][7][8]
Pierzchala et al introduced a similar concept namedelectronically-programmable analog circuit (EPAC).[9] It featured only a single integrator. However, they proposed a local interconnectarchitecture in order to try to avoid the bandwidth limitations.
Thereconfigurable analog signal processor (RASP) and a second version were introduced in 2002 by Hall et al.[10][11] Their design incorporated high-level elements such as second orderbandpass filters and 4 by 4 vector matrix multipliers into the CABs. Because of its architecture, it is limited to around 100 kHz and the chip itself is not able to support independent reconfiguration.
In 2004 Joachim Becker picked up theparallel connection of OTAs (operational transconductance amplifiers) and proposed its use in a hexagonal local interconnection architecture.[12] It did not require a routing network and eliminated switching the signal path that enhances the frequency response.
In 2005 Fabian Henrici worked with Joachim Becker to develop a switchable and invertible OTA which doubled the maximum FPAA bandwidth.[13] This collaboration resulted in the first manufactured FPAA in a0.13 μmCMOS technology.
In 2016 Dr. Jennifer Hasler from Georgia Tech designed a FPAA system on a chip that uses analog technology to achieve unprecedented power and size reductions.[14]
^Hall, Tyson; Twigg, Christopher; Hassler, Paul; Anderson, David (2004). "Application performance of elements in a floating-gate FPAA".2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512). pp. 589–592.doi:10.1109/ISCAS.2004.1329340.ISBN0-7803-8251-X.S2CID17212868.
^Lee, E.K.F.; Gulak, P.G. (1995). "A transconductor-based field-programmable analog array".Proceedings ISSCC '95 - International Solid-State Circuits Conference. pp. 198–199.doi:10.1109/ISSCC.1995.535521.ISBN0-7803-2495-1.S2CID56613166.
^Pierzchala, E.; Perkowski, M.A.; Van Halen, P.; Schaumann, R. (1995). "Current-mode amplifier/Integrator for a field-programmable analog array".Proceedings ISSCC '95 - International Solid-State Circuits Conference. pp. 196–197.doi:10.1109/ISSCC.1995.535520.ISBN0-7803-2495-1.S2CID60724962.
^Hall, T.S.; Twigg, C.M.; Gray, J.D.; Hasler, P.; Anderson, D.V. (2005). "Large scale field programmable analog arrays for analog signal processing".IEEE Transactions on Circuits and Systems I: Regular Papers.52 (11):2298–2307.doi:10.1109/TCSI.2005.853401.S2CID1148361.
^Suma George; Sihwan Kim; Sahil Shah; Jennifer Hasler; Michelle Collins; Farhan Adil; Richard Wunderlich; Stephen Nease; Shubha Ramakrishnan (June 2016). "A Programmable and Configurable Mixed-Mode FPAA SoC".IEEE Transactions on Very Large Scale Integration (VLSI) Systems.24 (6):2253–2261.doi:10.1109/TVLSI.2015.2504119.S2CID14027246.
