Incomputer architecture,acontrol bus is part of thesystem bus and is used byCPUs for communicating with other devices within the computer. While theaddress bus carries the information about the device with which the CPU is communicating and thedata bus carries the actual data being processed, the control bus carries commands from the CPU and returns status signals from the devices. For example, if the data is being read or written to the device the appropriate line (read or write) will be active (logic one).

The number and type of lines in a control bus varies but there are basic lines common to all microprocessors, such as:

• Read (${\displaystyle \overline{RD}}$). A single line that when active (logic zero) indicates the device is being read by the CPU.
• Write (${\displaystyle \overline{WR}}$). A single line that when active (logic zero) indicates the device is being written by the CPU.
• Byte enable (${\displaystyle \overline{E}}$). A group of lines that indicate the size of the data (8, 16, 32, 64 bytes).

The RD and WR signals of the control bus control the reading or writing of RAM, avoidingbus contention on the data bus.^[1]

Additional lines are microprocessor-dependent, such as:

• TransferACK ("acknowledgement"). Delivers information that the data was acknowledged (read) by the device.
• Bus request (BR, BREQ, or BRQ). Indicates a device is requesting the use of the (data) bus.
• Bus grant (BG or BGRT). Indicates the CPU has granted access to the bus.
• Interrupt request (IRQ). A device with lowerpriority is requesting access to the CPU.
• Clock signals. The signal on this line is used to synchronize data between the CPU and a device.
• Reset. If this line is active, the CPU will perform ahard reboot.

Systems that have more than onebus master have additional control bus signals that control which bus master drives the address bus, avoiding bus contention on the address bus.^[1]

• Address bus
• Data bus
• Bus mastering

• Definition byWebopedia.
• Computer system organization at theUniversity of California, Riverside.
• "Hardware and Software Architecture", aPowerPoint presentation atCalifornia State University, Los Angeles.

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