AMD APU

A-series APU
Release date	2011 (Original); 2017 (Zen based)
Codename	Fusion Desna Ontario Zacate Llano Hondo Trinity Weatherford Richland Kaveri Godavari Kabini Temash Carrizo Bristol Ridge Raven Ridge Picasso Renoir Cezanne Phoenix IGP Wrestler WinterPark BeaverCreek
Architecture	AMD64
Models	Desktop E-Series Desktop A-Series Notebook A, E, C and FX Series AMD Athlon withRadeon Graphics AMD Ryzen withRadeon Graphics
Cores	1 to 8
Transistors	32 nm 1.178B (Llano) 32 nm 1.303B (Trinity) 32 nm 1.3B (Richland) 28 nm 2.41B (Kaveri) 14 nm 4.95B (Raven Ridge) 12 nm (Picasso) 7 nm (Renoir & Cezanne) 6 nm (Rembrandt) 4 nm (Phoenix)
API support
OpenCL	1.2
OpenGL	4.1+
DirectX	Direct3D 11 Direct3D 12
History
Predecessor	Athlon II Sempron
Successor	Ryzen Zen-based Athlon

AMD Accelerated Processing Unit (APU), formerly known asFusion, is a series of 64-bitmicroprocessors fromAdvanced Micro Devices (AMD), combining a general-purposeAMD64 central processing unit (CPU) and 3Dintegrated graphics processing unit (IGPU) on a singledie.

AMD announced the first generation APUs,Llano for high-performance andBrazos for low-power devices, in January 2011 and launched the first units on June 14.^[1][2] The second generationTrinity for high-performance andBrazos-2 for low-power devices were announced in June 2012. The third generationKaveri for high performance devices were launched in January 2014, whileKabini andTemash for low-power devices were announced in the summer of 2013. Since the launch of theZen microarchitecture, Ryzen and Athlon APUs have released to the global market as Raven Ridge on the DDR4 platform, after Bristol Ridge a year prior.

AMD has also supplied semi-custom APUs for consoles starting with the release ofSony PlayStation 4 andMicrosoft Xbox Oneeighth generation video game consoles.

The AMD Fusion project started in 2006 with the aim of developing asystem on a chip that combined a CPU with a GPU on a singledie. This effort was moved forward by AMD's acquisition of graphics chipset manufacturerATI^[3] in 2006. The project reportedly required three internal iterations of the Fusion concept to create a product deemed worthy of release.^[3] Reasons contributing to the delay of the project include the technical difficulties of combining a CPU and GPU on the same die at a 45 nm process, and conflicting views on what the role of the CPU and GPU should be within the project.^[4]

The first generation desktop and laptop APU, codenamedLlano, was announced on 4 January 2011 at the 2011Consumer Electronics Show in Las Vegas and released shortly thereafter.^[5][6] It featuredK10 CPU cores and aRadeon HD 6000 series GPU on the same die on theFM1 socket. An APU for low-power devices was announced as theBrazos platform, based on theBobcat microarchitecture and a Radeon HD 6000 series GPU on the same die.^[7]

At a conference in January 2012, corporate fellow Phil Rogers announced that AMD would re-brand the Fusion platform as theHeterogeneous System Architecture (HSA), stating that "it's only fitting that the name of this evolving architecture and platform be representative of the entire, technical community that is leading the way in this very important area of technology and programming development."^[8] However, it was later revealed that AMD had been the subject of atrademark infringement lawsuit by the Swiss companyArctic, who used the name "Fusion" for a line ofpower supply products.^[9]

The second generation desktop and laptop APU, codenamedTrinity, was announced at AMD's 2010 Financial Analyst Day^[10][11] and released in October 2012.^[12] It featuredPiledriver CPU cores andRadeon HD 7000 series GPU cores on theFM2 socket.^[13] AMD released a new APU based on the Piledriver microarchitecture on 12 March 2013 for Laptops/Mobile and on 4 June 2013 for desktops under the codenameRichland.^[14] The second generation APU for low-power devices,Brazos 2.0, used exactly the same APU chip, but ran at higher clock speed andrebranded the GPU as Radeon HD 7000 series and used a new I/O controller chip.

Semi-custom chips were introduced in the Microsoft Xbox One andSony PlayStation 4 video game consoles,^[15][16] and subsequently in the MicrosoftXbox Series X|S and SonyPlayStation 5 consoles.

A third generation of the technology was released on 14 January 2014, featuring greater integration between CPU and GPU. The desktop and laptop variant is codenamedKaveri, based on theSteamroller architecture, while the low-power variants, codenamedKabini andTemash, are based on theJaguar architecture.^[17]

Since the introduction ofZen-based processors, AMD renamed their APUs as theRyzen with Radeon Graphics andAthlon with Radeon Graphics, with desktop units assigned withG suffix on their model numbers (e.g. Ryzen 5 3400G & Athlon 3000G) to distinguish them from regular processors or with basic graphics and also to differentiate away from their formerBulldozer eraA-series APUs. The mobile counterparts were always paired with Radeon Graphics regardless of suffixes.

AMD is a founding member of theHeterogeneous System Architecture (HSA) Foundation and is consequently actively working on developingHSA in cooperation with other members. The following hardware and software implementations are available in AMD's APU-branded products:

The following table shows features ofAMD's processors with 3D graphics, including APUs (see also:List of AMD processors with 3D graphics).

Platform			High, standard and low power														Low and ultra-low power
Codename	Server	Basic						Toronto
		Micro																Kyoto
	Desktop	Performance													Raphael	Phoenix
		Mainstream	Llano	Trinity	Richland	Kaveri	Kaveri Refresh (Godavari)	Carrizo	Bristol Ridge	Raven Ridge	Picasso	Renoir	Cezanne
		Entry
		Basic																Kabini				Dalí
	Mobile	Performance										Renoir	Cezanne	Rembrandt	Dragon Range
		Mainstream	Llano	Trinity	Richland	Kaveri		Carrizo	Bristol Ridge	Raven Ridge	Picasso	Renoir Lucienne	Cezanne Barceló			Phoenix
		Entry																				Dalí			Mendocino
		Basic															Desna, Ontario, Zacate	Kabini, Temash	Beema, Mullins	Carrizo-L	Stoney Ridge		Pollock
	Embedded			Trinity		Bald Eagle		Merlin Falcon, Brown Falcon		Great Horned Owl		Grey Hawk					Ontario, Zacate	Kabini	Steppe Eagle,Crowned Eagle, LX-Family		Prairie Falcon	Banded Kestrel		River Hawk
Released			Aug 2011	Oct 2012	Jun 2013	Jan 2014	2015	Jun 2015	Jun 2016	Oct 2017	Jan 2019	Mar 2020	Jan 2021	Jan 2022	Sep 2022	Jan 2023	Jan 2011	May 2013	Apr 2014	May 2015	Feb 2016	Apr 2019	Jul 2020	Jun 2022	Nov 2022
CPUmicroarchitecture			K10	Piledriver		Steamroller		Excavator	"Excavator+"[20]	Zen	Zen+	Zen 2	Zen 3	Zen 3+	Zen 4		Bobcat	Jaguar	Puma	Puma+[21]	"Excavator+"	Zen		Zen+	"Zen 2+"
ISA			x86-64 v1	x86-64 v2				x86-64 v3							x86-64 v4		x86-64 v1	x86-64 v2			x86-64 v3
Socket	Desktop	Performance	—												AM5	—	—
		Mainstream	—					AM4						—		—
		Entry	FM1	FM2		FM2+		FM2+[a],AM4	AM4					—
		Basic	—														—	AM1	—			FP5	—
	Other		FS1	FS1+,FP2		FP3		FP4		FP5		FP6		FP7	FL1	FP7 FP7r2 FP8	FT1	FT3	FT3b		FP4	FP5	FT5	FP5	FT6
PCI Express version			2.0			3.0								4.0	5.0	4.0	2.0				3.0
CXL			—														—
Fab. (nm)			GF32SHP (HKMGSOI)			GF28SHP (HKMG bulk)				GF14LPP (FinFET bulk)	GF12LP (FinFET bulk)	TSMCN7 (FinFET bulk)		TSMCN6 (FinFET bulk)	CCD: TSMCN5 (FinFET bulk) cIOD: TSMCN6 (FinFET bulk)	TSMC4nm (FinFET bulk)	TSMCN40 (bulk)	TSMCN28 (HKMG bulk)	GF 28SHP (HKMG bulk)			GF14LPP (FinFET bulk)		GF12LP (FinFET bulk)	TSMCN6 (FinFET bulk)
Die area (mm2)			228	246		245		245	250	210[22]		156	180	210	CCD: (2x) 70 cIOD: 122	178	75(+ 28FCH)	107		?	125	149			~100
MinTDP (W)			35	17				12				10		15	65	35	4.5	4	3.95	10	6			12	8
Max APUTDP (W)			100			95		65						45	170	54	18	25					6	54	15
Max stock APU base clock (GHz)			3	3.8	4.1	4.1		3.7	3.8	3.6	3.7	3.8	4.0	3.3	4.7	4.3	1.75	2.2	2	2.2	3.2	2.6	1.2	3.35	2.8
Max APUs per node[b]			1														1
Max core dies per CPU			1												2	1	1
Max CCX per core die			1									2	1				1
Max cores per CCX			4										8				2	4			2			4
MaxCPU[c]cores per APU			4									8			16	8	2	4			2			4
Maxthreads per CPU core			1							2							1					2
Integer pipeline structure			3+3	2+2						4+2		4+2+1	1+3+3+1+2				1+1+1+1				2+2	4+2			4+2+1
i386, i486, i586, CMOV, NOPL, i686,PAE,NX bit, CMPXCHG16B,AMD-V,RVI,ABM, and 64-bit LAHF/SAHF
IOMMU[d]			—	v2													v1		v2
BMI1,AES-NI,CLMUL, andF16C																	—
MOVBE			—
AVIC,BMI2,RDRAND, and MWAITX/MONITORX																	—
SME[e],TSME[e],ADX,SHA,RDSEED,SMAP,SMEP, XSAVEC, XSAVES, XRSTORS, CLFLUSHOPT, CLZERO, and PTE Coalescing			—														—
GMET, WBNOINVD, CLWB, QOS, PQE-BW, RDPID, RDPRU, and MCOMMIT			—														—
MPK,VAES			—														—
SGX			—														—
FPUs percore			1	0.5						1							1				0.5	1
Pipes per FPU			2														2
FPU pipe width			128-bit									256-bit					80-bit	128-bit							256-bit
CPUinstruction setSIMD level			SSE4a[f]	AVX				AVX2							AVX-512		SSSE3	AVX			AVX2
3DNow!			3DNow!+	—													—
PREFETCH/PREFETCHW
GFNI			—														—
AMX			—
FMA4, LWP,TBM, andXOP			—							—							—					—
FMA3
AMD XDNA			—														—
L1 data cache per core (KiB)			64	16				32									32
L1 data cacheassociativity (ways)			2	4				8									8
L1 instruction caches percore			1	0.5						1							1				0.5	1
Max APU total L1 instruction cache (KiB)			256	128		192				256					512	256	64		128		96	128
L1 instruction cacheassociativity (ways)			2			3				4		8					2				3	4			8
L2 caches percore			1	0.5						1							1				0.5	1
Max APU total L2 cache (MiB)			4					2				4			16		1	2			1			2
L2 cacheassociativity (ways)			16							8							16					8
Max on-dieL3 cache per CCX (MiB)			—							4			16		32		—						4
Max 3D V-Cache per CCD (MiB)										—					64	—							—
Max total in-CCDL3 cache per APU (MiB)										4		8	16		64								4
Max. total 3D V-Cache per APU (MiB)										—					64	—							—
Max. boardL3 cache per APU (MiB)										—													—
Max totalL3 cache per APU (MiB)										4		8	16		128								4
APU L3 cacheassociativity (ways)										16													16
L3 cache scheme										Victim													Victim
Max.L4 cache			—														—
Max stockDRAM support			DDR3-1866		DDR3-2133			DDR3-2133,DDR4-2400	DDR4-2400	DDR4-2933		DDR4-3200,LPDDR4-4266		DDR5-4800,LPDDR5-6400	DDR5-5200	DDR5-5600,LPDDR5x-7500	DDR3L-1333	DDR3L-1600	DDR3L-1866		DDR3-1866,DDR4-2400	DDR4-2400	DDR4-1600	DDR4-3200	LPDDR5-5500
MaxDRAM channels per APU			2														1					2	1	2
Max stockDRAMbandwidth (GB/s) per APU			29.866		34.132			38.400		46.932		68.256		102.400	83.200	120.000	10.666	12.800	14.933		19.200	38.400	12.800	51.200	88.000
GPUmicroarchitecture			TeraScale 2 (VLIW5)	TeraScale 3 (VLIW4)		GCN 2nd gen		GCN 3rd gen		GCN 5th gen[23]				RDNA 2		RDNA 3	TeraScale 2 (VLIW5)	GCN 2nd gen			GCN 3rd gen[23]	GCN 5th gen			RDNA 2
GPUinstruction set			TeraScale instruction set			GCN instruction set								RDNA instruction set			TeraScale instruction set	GCN instruction set							RDNA instruction set
Max stock GPU base clock (MHz)			600	800	844	866		1108		1250	1400	2100		2400	400		538	600	?	847	900	1200	600	1300	1900
Max stock GPU baseGFLOPS[g]			480	614.4	648.1	886.7		1134.5		1760	1971.2	2150.4		3686.4	102.4		86	?	?	?	345.6	460.8	230.4	1331.2	486.4
3D engine[h]			Up to 400:20:8	Up to 384:24:6		Up to 512:32:8				Up to 704:44:16[24]		Up to 512:32:8		768:48:8	128:8:4		80:8:4	128:8:4			Up to 192:12:8	Up to 192:12:4	192:12:4	Up to 512:?:?	128:?:?
			IOMMUv1			IOMMUv2											IOMMUv1		?		IOMMUv2
Video decoder			UVD 3.0			UVD 4.2		UVD 6.0		VCN 1.0[25]		VCN 2.1[26]	VCN 2.2[26]	VCN 3.1		?	UVD 3.0	UVD 4.0	UVD 4.2		UVD 6.2	VCN 1.0			VCN 3.1
Video encoder			—	VCE 1.0		VCE 2.0		VCE 3.1									—	VCE 2.0			VCE 3.4
AMD Fluid Motion
GPU power saving			PowerPlay	PowerTune													PowerPlay	PowerTune[27]
TrueAudio			—			[28]							?				—
FreeSync						1 2												1 2
HDCP[i]			?			1.4				2.2				2.3			?	1.4				2.2			2.3
PlayReady[i]			—							3.0 not yet							—					3.0 not yet
Supported displays[j]			2–3	2–4				3		3 (desktop) 4 (mobile, embedded)		4					2				3	4		4
/drm/radeon[k][30][31]									—												—
/drm/amdgpu[k][32]			—			[33]											—	[33]

AMD APUs have CPU modules, cache, and a discrete-class graphics processor, all on the same die using the same bus. This architecture allows for the use of graphics accelerators, such as OpenCL, with the integrated graphics processor.^[34] The goal is to create a "fully integrated" APU, which, according to AMD, will eventually feature 'heterogeneous cores' capable of processing both CPU and GPU work automatically, depending on the workload requirement.^[35]

• "Stars"AMD K10-cores^[36]
• IntegratedEvergreen/VLIW5-based GPU (brandedRadeon HD 6000 series)
• Northbridge^[18][19]
• PCIe^[18][19]
• DDR3^[18][19]memory controller to arbitrate betweencoherent and non-coherent memory requests.^[37] Thephysical memory is partitioned between the GPU (up to 512 MB) and the CPU (the remainder).^[37]
• Unified Video Decoder^[18][19]
• AMD Eyefinity multi-monitor-support

The first generation APU, released in June 2011, was used in both desktops and laptops. It was based on the K10 architecture and built on a 32 nm process featuring two to four CPU cores on athermal design power (TDP) of 65-100 W, and integrated graphics based on the Radeon HD 6000 series with support forDirectX 11,OpenGL 4.2 andOpenCL 1.2. In performance comparisons against the similarly pricedIntel Core i3-2105, the Llano APU was criticised for its poor CPU performance^[38] and praised for its better GPU performance.^[39][40] AMD was later criticised for abandoningSocket FM1 after one generation.^[41]

• Bobcat-based CPU
• Evergreen/VLIW5-based GPU (brandedRadeon HD 6000 series andRadeon HD 7000 series)
• Northbridge^[18][19]
• PCIe^[18][19] support.
• DDR3 SDRAM^[18][19]memory controller to arbitrate betweencoherent and non-coherent memory requests.^[37] Thephysical memory is partitioned between the GPU (up to 512 MB) and the CPU (the remainder).^[37]
• Unified Video Decoder (UVD)^[18][19]

The AMD Brazos platform was introduced on 4 January 2011, targeting thesubnotebook,netbook and low powersmall form factor markets.^[5] It features the 9-watt AMD C-Series APU (codename: Ontario) for netbooks and low power devices as well as the 18-watt AMD E-Series APU (codename: Zacate) for mainstream and value notebooks,all-in-ones and small form factor desktops. Both APUs feature one or two Bobcat x86 cores and a RadeonEvergreen Series GPU with full DirectX11,DirectCompute and OpenCL support includingUVD3 video acceleration for HD video including1080p.^[5]

AMD expanded the Brazos platform on 5 June 2011 with the announcement of the 5.9-watt AMD Z-Series APU (codename: Desna) designed for theTablet market.^[42] The Desna APU is based on the 9-watt Ontario APU. Energy savings were achieved by lowering the CPU, GPU and northbridge voltages, reducing the idle clocks of the CPU and GPU as well as introducing a hardware thermal control mode.^[42] A bidirectionalturbo core mode was also introduced.

AMD announced the Brazos-T platform on 9 October 2012. It comprised the 4.5-watt AMD Z-Series APU (codenamedHondo) and the A55T Fusion Controller Hub (FCH), designed for the tablet computer market.^[43][44] The Hondo APU is a redesign of the Desna APU. AMD lowered energy use by optimizing the APU and FCH for tablet computers.^[45][46]

The Deccan platform including Krishna and Wichita APUs were cancelled in 2011. AMD had originally planned to release them in the second half 2012.^[47]

Piledriver-based AMD APUs

An AMD A4-5300 for desktop systems

An AMD A10-4600M for mobile systems

• Piledriver-based CPU
• Northern Islands/VLIW4-based GPU (brandedRadeon HD 7000 and8000 series)
• UnifiedNorthbridge – includes AMD Turbo Core 3.0, which enables automatic bidirectional power management betweenCPU modules andGPU. Power to theCPU andGPU is controlled automatically by changing theclock rate depending on theload. For example, for a non-overclocked A10-5800K APU theCPU frequency can change from 1.4 GHz to 4.2 GHz, and theGPU frequency can change from 304 MHz to 800 MHz. In addition, CC6 mode is capable of powering down individual CPU cores, while PC6 mode is able to lower the power on the entire rail.^[48]
• AMD HD Media Accelerator^[49] – includes AMD Perfect Picture HD, AMD Quick Stream technology, and AMD Steady Video technology.
• Display controllers:AMD Eyefinity-support formulti-monitor set-ups,HDMI,DisplayPort 1.2,DVI

Trinity

The first iteration of the second generation platform, released in October 2012, brought improvements to CPU and GPU performance to both desktops and laptops. The platform features 2 to 4 Piledriver CPU cores built on a 32 nm process with a TDP between 65 W and 100 W, and a GPU based on the Radeon HD7000 series with support for DirectX 11, OpenGL 4.2, and OpenCL 1.2. The Trinity APU was praised for the improvements to CPU performance compared to the Llano APU.^[50]

Richland

• "EnhancedPiledriver" CPU cores^[51]
• Temperature Smart Turbo Core technology. An advancement of the existing Turbo Core technology, which allows internal software to adjust the CPU and GPU clock speed to maximise performance within the constraints of theThermal design power of the APU.^[52]
• New low-power consumption CPUs with only 45 W TDP^[53]

The release of this second iteration of this generation was 12 March 2013 for mobile parts and 5 June 2013 for desktop parts.

• Jaguar-based CPU
• Graphics Core Next 2nd Gen-based GPU
• Socket AM1 andSocket FT3 support
• Target segment desktop and mobile

In January 2013 the Jaguar-based Kabini and Temash APUs were unveiled as the successors of the Bobcat-based Ontario, Zacate and Hondo APUs.^[54][55][56] The Kabini APU is aimed at the low-power, subnotebook, netbook, ultra-thin and small form factor markets, while the Temash APU is aimed at the tablet, ultra-low power and small form factor markets.^[56] The two to four Jaguar cores of the Kabini and Temash APUs feature numerous architectural improvements regarding power requirement and performance, such as support for newer x86-instructions, a higherIPC count, a CC6 power state mode andclock gating.^[57][58][59] Kabini and Temash are AMD's first, and also the first ever quad-core x86 basedSoCs.^[60] The integratedFusion Controller Hubs (FCH) for Kabini and Temash are codenamed "Yangtze" and "Salton", respectively.^[61] The Yangtze FCH features support for two USB 3.0 ports, two SATA 6 Gbit/s ports, as well as the xHCI 1.0 and SD/SDIO 3.0 protocols for SD-card support.^[61]Both chips feature DirectX 11.1-compliantGCN-based graphics as well as numerous HSA improvements.^[54][55]They were fabricated at a 28 nm process in an FT3ball grid array package byTaiwan Semiconductor Manufacturing Company (TSMC), and were released on 23 May 2013.^[57][62][63]

The PlayStation 4 and Xbox One were revealed to both be powered by 8-core semi-custom Jaguar-derived APUs.

• Steamroller-based CPU with 2–4 cores^[64]
• Graphics Core Next 2nd Gen-based GPU with 192–512 shader processors^[65]
• 15–95 W thermal design power^[64][65]
• Fastest mobile processor of this series: AMD FX-7600P (35 W)
• Fastest desktop processor of this series: AMD A10-7850K (95 W)
• Socket FM2+ andSocket FP3^[64]
• Target segment desktop and mobile
• Heterogeneous System Architecture-enabledzero-copying throughpointer passing

The third generation of the platform, codenamed Kaveri, was partly released on 14 January 2014.^[66] Kaveri contains up to four Steamroller CPU cores clocked to 3.9 GHz with a turbo mode of 4.1 GHz, up to a 512-core Graphics Core Next GPU, two decode units per module instead of one (which allows each core to decode four instructions per cycle instead of two), AMD TrueAudio,^[67]Mantle API,^[68] an on-chip ARM Cortex-A5 MPCore,^[69] and will release with a new socket, FM2+.^[70] Ian Cutress and Rahul Garg ofAnandtech asserted that Kaveri represented the unified system-on-a-chip realization of AMD's acquisition of ATI. The performance of the 45 W A8-7600 Kaveri APU was found to be similar to that of the 100 W Richland part, leading to the claim that AMD made significant improvements in on-die graphics performance per watt;^[64] however, CPU performance was found to lag behind similarly specified Intel processors, a lag that was unlikely to be resolved in the Bulldozer family APUs.^[64] The A8-7600 component was delayed from a Q1 launch to an H1 launch because the Steamroller architecture components allegedly did not scale well at higher clock speeds.^[71]

AMD announced the release of the Kaveri APU for the mobile market on 4 June 2014 atComputex 2014,^[65] shortly after the accidental announcement on the AMD website on 26 May 2014.^[72] The announcement included components targeted at the standard voltage, low-voltage, and ultra-low voltage segments of the market. In early-access performance testing of a Kaveri prototype laptop, AnandTech found that the 35 W FX-7600P was competitive with the similarly priced 17 W Intel i7-4500U in synthetic CPU-focused benchmarks, and was significantly better than previous integrated GPU systems on GPU-focused benchmarks.^[73]Tom's Hardware reported the performance of the Kaveri FX-7600P against the 35 WIntel i7-4702MQ, finding that the i7-4702MQ was significantly better than the FX-7600P in synthetic CPU-focused benchmarks, whereas the FX-7600P was significantly better than the i7-4702MQ'sIntel HD 4600 iGPU in the four games that could be tested in the time available to the team.^[65]

• Puma-based CPU
• Graphics Core Next 2nd Gen-based GPU with 128 shader processors
• Socket FT3
• Target segment ultra-mobile

• Puma+-based CPU with 2–4 cores^[74]
• Graphics Core Next 2nd Gen-based GPU with 128 shader processors^[74]
• 12–25 W configurable TDP^[74]
• Socket FP4 support; pin-compatible with Carrizo^[74]
• Target segment mobile and ultra-mobile

• Excavator-based CPU with 4 cores^[75]
• Graphics Core Next 3rd Gen-based GPU
• Memory controller supports DDR3 SDRAM at 2133 MHz and DDR4 SDRAM at 1866 MHz^[75]
• 15–35 W configurable TDP (with the 15 W cTDP unit having reduced performance)^[75]
• Integratedsouthbridge^[75]
• Socket FP4
• Target segment mobile
• Announced by AMD onYouTube (19 November 2014)^[76]

• Update of the desktop Kaveri series with higher clock frequencies or smaller power envelope
• Steamroller-based CPU with 4 cores^[77]
• Graphics Core Next 2nd Gen-based GPU
• Memory controller supports DDR3 SDRAM at 2133 MHz
• 65/95 W TDP with support for configurable TDP
• Socket FM2+
• Target segment desktop
• Listed since Q2 2015

• Excavator-based CPU with 2–4 cores
• 1 MB L2 cache per module
• Graphics Core Next 3rd Gen-based GPU^{[78][79][80][81]}
• Memory controller supports DDR4 SDRAM
• 15/35/45/65 W TDP with support for configurable TDP
• 28 nm
• Socket AM4 for desktop
• Target segment desktop, mobile and ultra-mobile

• Zen-based CPU cores^[82] withsimultaneous multithreading (SMT)
• 512 KBL2 cache per core
• 4 MB L3 cache
• Precision Boost 2^[83]
• Graphics Core Next 5th Gen "Vega"-based GPU^[84]
• Memory controller supportsDDR4 SDRAM
• Video Core Next as successor ofUVD+VCE
• 14 nm atGlobalFoundries
• Socket FP5 for mobile^[85] andAM4 for desktop
• Target segment desktop and mobile
• Listed since Q4 2017

• Zen+-based CPU microarchitecture^[86]
• Refresh of Raven Ridge on 12 nm with improved latency and efficiency/clock frequency. Features similar to Raven Ridge
• Launched April 2018

• Zen 2-based CPU microarchitecture^[85]
• Graphics Core Next 5th Gen "Vega"-based GPU^[87]
• VCN 2.1^[87]
• Memory controller supports DDR4 andLPDDR4X SDRAM up to 4266 MHz^[87]
• 15 and 45 W TDP for mobile and 35 and 65 W TDP for desktop^[85]
• 7 nm atTSMC^[88]
• Socket FP6 for mobile andsocket AM4 for desktop^[85]
• Release July 2019^[87][88]

• Zen 3-based CPU microarchitecture^[89]
• Graphics Core Next 5th Gen "Vega"-based GPU^[90]
• Memory controller supports DDR4 and LPDDR4X SDRAM up to 4266 MHz^[90][89]
• Up to 45 W TDP for mobile;^[91] 35W to 65W TDP for desktop.^[90]
• 7 nm atTSMC^[89]
• Socket AM4 for desktop^[90]
• Socket FP6 for mobile
• Released for mobile early 2021^[89] with desktop counterparts released in November 2020.^[90]

• Zen 3+ based CPU microarchitecture^[92]
• RDNA 2-based GPU^[92]
• Memory controller supports DDR5-4800 and LPDDR5-6400^[92]
• Up to 45 W TDP for mobile
• Node:TSMC N6^[92]
• Socket FP7 for mobile
• Released for mobile early 2022^[92]

• Zen 4 based CPU microarchitecture^[93]
• RDNA 3-based GPU with up to 12 CU^[93]
• Memory controller supports DDR5-5600 and LPDDR5x-7500
• XDNA-powered NPU with up to 16 TOPS^[94]
• Up to 54 W TDP for mobile
• Up to 65 W TDP for desktop^[94]
• Node:TSMC N4^[93]
• Sockets FP7, FP7r2 & FP8 for mobile
• Socket AM5 for desktop
• Released for mobiles early 2023^[93]
• Released for desktop early 2024^[94]

• Zen 5 based CPU microarchitecture with a mix of Zen 5 and 5c cores^[95]
• RDNA 3.5-based GPU^[95] with up to 16 CU
• Memory controller supports DDR5-5600 and LPDDR5x-8000
• XDNA2-powered NPU with up to 55 TOPS^[95]
• Up to 54 W TDP for mobile
• Node:TSMC N4^[95]
• Socket FP8 for mobile
• Released for mobile early 2024

• List of AMD processors with 3D graphics
• Ryzen
• AMD mobile platform
• List of AMD mobile microprocessors
• Radeon
• Intel Graphics Technology
• List of Nvidia graphics processing units

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• HSA Heterogeneous System Architecture Overview onYouTube by Vinod Tipparaju atSC13 in November 2013
• HSA and the software ecosystem
• HSAArchived 5 March 2016 at theWayback Machine

• AMD x86 microprocessors
• System on a chip
• Heterogeneous System Architecture
• X86 microarchitectures
• Computer-related introductions in 2011

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