| Designer | Motorola |
|---|---|
| Bits | 16/32-bit |
| Introduced | 1979; 46 years ago (1979) |
| Design | CISC |
| Branching | Condition code |
| Endianness | Big |
| Registers | |
| |
| General information | |
|---|---|
| Launched | 1979 |
| Discontinued | June 1, 1996; 28 years ago (1996-06-01) |
| Designed by | Motorola |
| Performance | |
| Max.CPUclock rate | 4 MHz to 16.67 MHz |
| Data width | 16 bits |
| Address width | 24 bits |
| Architecture and classification | |
| Instruction set | Motorola 68000 series |
| Physical specifications | |
| Transistors |
|
| Package |
|
| History | |
| Successor | Motorola 68010 |
TheMotorola 68000 (sometimes shortened toMotorola 68k orm68k and usually pronounced "sixty-eight-thousand")[2][3] is a 16/32-bitcomplex instruction set computer (CISC)microprocessor, introduced in 1979 byMotorola Semiconductor Products Sector.
The design implements a32-bitinstruction set, with 32-bitregisters and a 16-bit internaldata bus.[4] Theaddress bus is 24 bits and does not usememory segmentation, which made it easier to program for. Internally, it uses a16-bit dataarithmetic logic unit (ALU) and two more 16-bit ALUs used mostly for addresses,[4] and has a 16-bit externaldata bus.[5] For this reason, Motorola termed it a 16/32-bit processor.
As one of the first widely available processors with a 32-bit instruction set, large unsegmented address space, and relatively high speed for the era, the 68k was a popular design through the 1980s. It was widely used in a new generation ofpersonal computers withgraphical user interfaces, including theMacintosh 128K,Amiga,Atari ST, andX68000. The SegaGenesis/Mega Drive console, released in 1988, is also powered by the 68000.
Later processors in theMotorola 68000 series, beginning with theMotorola 68020, use full 32-bit ALUs and have full 32-bit address and data buses, speeding up 32-bit operations and allowing 32-bit addressing, rather than the 24-bit addressing of the 68000 and68010 or the 31-bit addressing of theMotorola 68012. The original 68k is generally softwareforward-compatible with the rest of the line despite being limited to a 16-bit wide external bus.[4]
After 46 years inproduction, the 68000architecture is still in use.[6][7]
Motorola's first widely producedmicroprocessor was the6800, introduced in early 1974 and available in quantity late that year.[8] The company set itself the goal of selling 25,000 units by September 1976, a goal they did meet. Although a capable design, it was eclipsed by more powerful designs, such as theZilog Z80, and less expensive designs, such as theMOS Technology 6502.[9] By late 1976, the sales book was flat and the division was only saved by a project forGeneral Motors that turned into a huge product line forengine control and other tasks.[10]
By the time the 6800 was introduced, a small number of 16-bit designs had come to market. These were generally modeled onminicomputer platforms like theData General Nova orPDP-8. Based on thesemiconductor manufacturing processes of the era, these were often multi-chip solutions like theNational SemiconductorIMP-16, or the single-chipPACE that had issues with speed.[11]
With the sales prospects for the 6800 dimming, but still cash-flush from the engine control sales, in late 1976 Colin Crook, Operations Manager, began considering how to successfully win future sales. They were aware thatIntel was working on a 16-bit extension of their8080 series, which would emerge as theIntel 8086, and had heard rumors of a 16-bitZilog Z80, which became theZ8000. These would use new design techniques that would eliminate the problems seen in earlier 16-bit systems.[12]
Motorola knew that if they launched a product similar to the 8086, within 10% of its capabilities, Intel would outperform them in the market. In order to compete, they set themselves the goal of being two times as powerful at the same cost, or one-half the cost with the same performance. Crook decided that they would attack the high-end of the market with the most powerful processor on the market.[12] Another 16-bit would not do, their design would have to be bigger, and that meant having some 32-bit features.[13] Crook had decided on this approach by the end of 1976.[12]
Crook formed the Motorola Advanced Computer System on Silicon (MACSS) project to build the design and hired Tom Gunter to be its principal architect. Gunter began forming his team in January 1977.[14] The performance goal was set at 1million instructions per second (MIPS). They wanted the design to not only win back microcomputer vendors likeApple Computer andTandy, but also minicomputer companies likeNCR andAT&T.[14]
The team decided to abandon an attempt atbackward compatibility with the 6800, as they felt the 8-bit designs were too limited to be the basis for new designs. The new system was influenced by thePDP-11, the most popular minicomputer design of the era.[15] At the time, a key concept in minis was the concept of anorthogonal instruction set, in which every operation was allowed to work on any sort of data. To feed the correct data into the internal units, MACSS made extensive use ofmicrocode, essentially small programs inread only memory that gathered up the required data, performed the operations and wrote out the results. MACSS was among the first to use this technique in a microprocessor.[16][17]
There was a large amount of support hardware for the 6800 that would remain useful, things likeUARTs and similar interfacing systems. For this reason, the new design retained abus protocol compatibility mode for existing 6800 peripheral devices.[18][17]
A chip with 32 data and 32 addressing pins would require 64 pins, plus more for power and other features. At the time, 64-pindual inline package (DIP)s were "large, heavy-cost" systems and "just terrible", making that the largest they could consider. To make it fit, Crook selected a hybrid design, with a 32-bitinstruction set architecture (ISA) but 16-bit components implementing it, like thearithmetic logic unit (ALU).[14] The external interface was reduced to 16 data pins and 24 for addresses, allowing it all to fit in a 64-pin package. This became known as the "Texas Cockroach".[13][a]
By the mid-1970s, Motorola's MOS design techniques had become less advanced than their competition, and their fabrication lines at times struggled with lowyields. By the late-1970s, the company had entered a technology exchange program withHitachi, dramatically improving their production capabilities. As part of this, a new fab named MOS-8 was built using the latest 5-inchwafer sizes and Intel'sHMOS process with a 3.5 μm feature size.[19] This was an investment aimed at catching the competition: even upstart semiconductor companies such as Zilog andMOS Technology had introduced CPUs fabricated ondepletion-modeNMOS logic before Motorola did. In fact, Motorola may have substantially lagged contemporaries in phasing out enhancement mode and metal gate, with Gunter recollecting that the 68000 itself had to succeed despite initially adopting a metal-gate design.[20] Though the point about playing catch-up is clear, this could not have been an entirely accurate summary because Motorola's 1976 datasheets, predating the inception of the MACCS project, denote the majority of its 6800 family in silicon-gate.[21] Indeed, Gunter's own 1979 article introducing the 68000 highlighted it as a silicon-gate depletion-mode HMOS design.[22] Whatever the degree of Motorola's process and manufacturing deficits in the early days, the team was undeterred and would not compromise in its pursuit of a microprocessor with industry-leading performance.[23]
Formally introduced in September 1979,[24] initial samples were released in February 1980, with production chips available over the counter in November.[25] Initial speed grades were 4, 6, and 8 MHz. 10 MHz chips became available during 1981,[26] and 12.5 MHz chips by June 1982.[25] The 16.67 MHz "12F" version of the MC68000, the fastest version of the original HMOS chip, was not produced until the late 1980s.
By the start of 1981, the 68k was winning orders in the high end, and Gunter began to approach Apple to win their business. At that time, the 68k sold for about $125 in quantity. In meetings withSteve Jobs, Jobs talked about using the 68k in theApple Lisa, but stated "the real future is in this product that I'm personally doing. If you want this business, you got to commit that you'll sell it for $15."[27] Motorola countered by offering to sell it at $55 at first, then step down to $35, and so on. Jobs agreed, and theMacintosh moved from the6809 to the 68k. The average price eventually reached $14.76.[27]
In 1982, the 68000 received a minor update to itsinstruction set architecture (ISA) to supportvirtual memory and to conform to thePopek and Goldberg virtualization requirements. The updated chip is called the68010.[28] It also adds a new "loop mode" which speeds up small loops, and increases overall performance by about 10% at the same clock speeds. A further extended version, which exposes 31 bits of the address bus, was also produced in small quantities as the68012.
To support lower-cost systems and control applications with smaller memory sizes, Motorola introduced the 8-bit compatibleMC68008, also in 1982. This is a 68000 with an 8-bit data bus and a smaller (20-bit) address bus. After 1982, Motorola devoted more attention to the68020 and88000 projects.
Several other companies weresecond-source manufacturers of the HMOS 68000. These includedHitachi (HD68000), who shrank the feature size to 2.7 μm for their 12.5 MHz version,[25]Mostek (MK68000),Rockwell (R68000),Signetics (SCN68000),Thomson/SGS-Thomson (originally EF68000 and later TS68000), andToshiba (TMP68000). Toshiba was also a second-source maker of the CMOS 68HC000 (TMP68HC000).
Encrypted variants of the 68000, being the Hitachi FD1089 and FD1094, store decryption keys for opcodes and opcode data in battery-backed memory and were used in certain Sega arcade systems includingSystem 16 to prevent piracy and illegal bootleg games.[29]
The 68HC000, the firstCMOS version of the 68000, was designed by Hitachi and jointly introduced in 1985.[30] Motorola's version is called the MC68HC000, while Hitachi's is the HD68HC000. The 68HC000 offers speeds of 8–20 MHz. Except for using CMOS circuitry, it behaved identically to the HMOS MC68000, but the change to CMOS greatly reduced its power consumption. The original HMOS MC68000 consumed around 1.35 watts at an ambient temperature of 25 °C, regardless of clock speed, while the MC68HC000 consumed only 0.13 watts at 8 MHz and 0.38 watts at 20 MHz. (Unlike CMOS circuits, HMOS still draws power when idle, so power consumption varies little with clock rate.) Apple selected the 68HC000 for use in theMacintosh Portable. In 2024, Rochester Electronics was licensed by NXP to continue to produce the MC68HC000. Both the physical design and test program were transferred to Rochester from NXP to continue to supply an authorized source to the market. The Rochester Electronics version of the 68HC000 is a product clone of the J82M mask set which was the last mask set used by Motorola.
Motorola replaced the MC68008 with the MC68HC001 in 1990.[31] This chip resembles the 68HC000 in most respects, but its data bus can operate in either 16-bit or 8-bit mode, depending on the value of an input pin at reset. Thus, like the 68008, it can be used in systems with cheaper 8-bit memories.
The later evolution of the 68000 focused on more modernembedded control applications and on-chip peripherals. The68EC000 chip and SCM68000 core remove the M6800 peripheral bus, and exclude the MOVE from SR instruction from user mode programs, making the 68EC000 and 68SEC000 the only 68000 CPUs not 100% object code compatible with previous 68000 CPUs when run in User Mode. When run in Supervisor Mode, there is no difference.[32] In 1996, Motorola updated the standalone core with fully static circuitry, drawing only 2 μW in low-power mode, calling it the MC68SEC000.[33]
Motorola ceased production of the HMOS MC68000, as well as the MC68008, MC68010, MC68330, and MC68340 in on June 1, 1996,[34][35] but its spin-off companyFreescale Semiconductor was still producing the MC68HC000, MC68HC001, MC68EC000, and MC68SEC000, as well as the MC68302 and MC68306 microcontrollers and later versions of theDragonBall family. The 68000's architectural descendants, the680x0,CPU32, andColdfire families, were also still in production. More recently, with the Sendai fab closure, all 68HC000, 68020, 68030, and 68882 parts have been discontinued, leaving only the 68SEC000 in production.[36]
Since being succeeded by "true" 32-bit microprocessors, the 68000 is used as the core of manymicrocontrollers. In 1989, Motorola introduced theMC68302 communications processor.[37]
IBM considered the 68000 for the IBM PC but chose theIntel 8088; however, IBM Instruments briefly sold the 68000-basedIBM System 9000 laboratory computer systems. The 68k instruction set is particularly well suited to implement Unix,[38] and the 68000 and its successors became the dominant CPUs for Unix-basedworkstations includingSun workstations andApollo/Domain workstations.
In 1981, Motorola introduced theMotorola 68000 Educational Computer Board, a single-board computer for educational and training purposes which in addition to the 68000 itself contained memory, I/O devices, programmable timer and wire-wrap area for custom circuitry. The board remained in use in US colleges as a tool for learning assembly programming until the early 1990s.[39]
At its introduction, the 68000 was first used in high-priced systems, including multiusermicrocomputers like theWICAT 150,[40] earlyAlpha Microsystems computers,Sage II / IV,Tandy 6000 /TRS-80 Model 16, andFortune 32:16; single-userworkstations such asHewlett-Packard'sHP 9000 Series 200 systems, the firstApollo/Domain systems,Sun Microsystems'Sun-1, and theCorvus Concept; and graphicsterminals likeDigital Equipment Corporation'sVAXstation 100 andSilicon Graphics' IRIS 1000 and 1200.Unix systems rapidly moved to the more capable later generations of the 68k line, which remained popular in that market throughout the 1980s.
By the mid-1980s, falling production cost made the 68000 viable for use inpersonal computers starting with theApple Lisa andMacintosh, and followed by theAmiga,Atari ST, andX68000.
TheSinclair QL microcomputer, along with its derivatives, such as the ICLOne Per Desk business terminal, was the most commercially important utilisation of the 68008. Helix Systems (in Missouri, United States) designed an extension to theSWTPCSS-50 bus, the SS-64, and produced systems built around the 68008 processor. 68000[41] and 68008[42] second processors were released for the BBC Micro in 1984 and 1985 respectively, and according to Steve Furber contributed to Acorn developing the ARM.[43]
While the adoption of RISC and x86 displaced the 68000 series as desktop/workstation CPU, the processor found substantial use inembedded applications. By the early 1990s, quantities of 68000 CPUs could be purchased for less than 30 USD per part.[citation needed]
The 68000 also saw great success as an embedded controller. As early as 1981,laser printers such as the Imagen Imprint-10 were controlled by external boards equipped with the 68000. The firstHP LaserJet, introduced in 1984, came with a built-in 8 MHz 68000. Other printer manufacturers adopted the 68000, including Apple with its introduction of theLaserWriter in 1985, the firstPostScript laser printer. The 68000 continued to be widely used in printers throughout the rest of the 1980s, persisting well into the 1990s in low-end printers.
The 68000 was successful in the field of industrial control systems. Among the systems benefited from having a 68000 or derivative as their microprocessor were families ofprogrammable logic controllers (PLCs) manufactured byAllen-Bradley,Texas Instruments and subsequently, following the acquisition of that division of TI, bySiemens. Users of such systems do not accept product obsolescence at the same rate as domestic users, and it is entirely likely that despite having been installed over 20 years ago, many 68000-based controllers will continue in reliable service well into the 21st century.
In a number ofdigital oscilloscopes from the 80s,[44] the 68000 has been used as a waveform display processor; some models including theLeCroy 9400/9400A[45] also use the 68000 as a waveform math processor (including addition, subtraction, multiplication, and division of two waveforms/references/waveform memories), and some digital oscilloscopes using the 68000 (including the 9400/9400A) can also performfast Fourier transform functions on a waveform.
The683XX microcontrollers, based on the 68000 architecture, are used in networking and telecom equipment, television set-top boxes, laboratory and medical instruments, and even handheld calculators. The MC68302 and its derivatives have been used in many telecom products from Cisco, 3com, Ascend, Marconi, Cyclades and others. Past models of thePalm PDAs and theHandspring Visor used theDragonBall, a derivative of the 68000.AlphaSmart used the DragonBall family in later versions of its portable word processors.Texas Instruments used the 68000 in its high-end graphing calculators, theTI-89 andTI-92 series andVoyage 200.
A modified version of the 68000 formed the basis of theIBM XT/370 hardware emulator of the System 370 processor.
Video game manufacturers used the 68000 as the backbone of manyarcade games and homegame consoles: Atari'sFood Fight, from 1982, was one of the first 68000-based arcade games. Others includedSega'sSystem 16,Capcom'sCP System andCPS-2, andSNK'sNeo Geo. By the late 1980s, the 68000 was inexpensive enough to power home game consoles, such as Sega'sGenesis console, and also theSega CD attachment for it (a Sega CD system has three CPUs, two of them 68000s.) The 68000 is also the CPU of theSega Pico, a young children's educational game console. The multi-processorAtari Jaguar console from 1993 used a 68000 as a support chip, although, due to familiarity, some developers used it as the primary processor. The 1994Sega Saturn console used the 68000 as a sound co-processor. In October 1995, the 68000 made it into ahandheld game console, Sega'sGenesis Nomad, as its CPU.[46]
Certain arcade games (such asSteel Gunner and others based onNamco System 2) use a dual 68000 CPU configuration,[47] and systems with a triple 68000 CPU configuration also exist (such asGalaxy Force and others based on the Sega Y Board),[48] along with a quad 68000 CPU configuration, which has been used byJaleco (one 68000 for sound has a lower clock rate compared to the other 68000 CPUs)[49] for games such asBig Run andCisco Heat; another, fifth 68000 (at a different clock rate than the other 68000 CPUs) was used in the Jaleco arcade gameWild Pilot forinput/output (I/O) processing.[50]
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The 68000 has a 24-bit external address bus and two byte-select signals "replaced" A0. These 24 lines can therefore address 16 MB of physical memory with byte resolution. Address storage and computation uses 32 bits internally; however, the 8 high-order address bits are ignored due to the physical lack of device pins. This allows it to run software written for a logically flat 32-bitaddress space, while accessing only a 24-bit physical address space. Motorola's intent with the internal 32-bit address space was forward compatibility, making it feasible to write 68000 software that would take full advantage of later 32-bit implementations of the 68000 instruction set.[4]
However, this did not prevent programmers from writing forward incompatible software. "24-bit" software that discarded the upper address byte, or used it for purposes other than addressing, could fail on 32-bit 68000 implementations. For example, early (pre-7.0) versions of Apple'sMac OS used the high byte of memory-block master pointers to hold flags such aslocked andpurgeable. Later versions of the OS moved the flags to a nearby location, and Apple began shipping computers which had "32-bit clean" ROMs beginning with the release of the 1989 Mac IIci.
The 68000 family stores multi-byte integers in memory inbig-endian order.
TheCPU has eight 32-bit general-purpose dataregisters (D0-D7), and eight address registers (A0-A7). The last address register is thestack pointer, and assemblers accept the label SP as equivalent to A7. This was a good number of registers at the time in many ways. It was small enough to allow the 68000 to respond quickly tointerrupts (even in the worst case where all 8 data registers D0–D7 and 7 address registers A0–A6 needed to be saved, 15 registers in total), and yet large enough to make most calculations fast, because they could be done entirely within the processor without keeping any partial results in memory. (Note that an exception routine in supervisor mode can also save the user stack pointer A7, which would total 8 address registers. However, the dual stack pointer (A7 and supervisor-mode A7') design of the 68000 makes this normally unnecessary, except when a task switch is performed in a multitasking system.)
Having the two types of registers allows one 32-bit address and one 16-bit data calculation to take place at the same time. This results in reduced instruction execution time as addresses and data can be processed in parallel.[4]
The 68000 has a 16-bit status register. The upper 8 bits is the system byte, and modification of it is privileged. The lower 8 bits is the user byte, also known as the condition code register (CCR), and modification of it is not privileged. The 68000 comparison, arithmetic, and logic operations modify condition codes to record their results for use by later conditional jumps. The condition code bits are "carry" (C), "overflow" (V), "zero" (Z), "negative" (N) and "extend" (X). The "extend" (X) flag deserves special mention, because it is separate from thecarry flag. This permits the extra bit from arithmetic, logic, and shift operations to be separated from the carrymultiprecision arithmetic.[51]
The designers attempted to make the assembly languageorthogonal. That is, instructions are divided into operations andaddress modes, and almost all address modes are available for almost all instructions. There are 56 instructions and a minimum instruction size of 16 bits. Many instructions and addressing modes are longer to include more address or mode bits.
The CPU, and later the whole family, implements two levels of privilege. User mode gives access to everything except privileged instructions such as interrupt level controls.[52] Supervisor privilege gives access to everything. An interrupt always becomes supervisory. The supervisor bit is stored in the status register, and is visible to user programs.[52]
An advantage of this system is that the supervisor level has a separate stack pointer. This permits amultitasking system to use very small stacks for tasks, because the designers do not have to allocate the memory required to hold the stack frames of a maximum stack-up of interrupts.
The CPU recognizes seveninterrupt levels. Levels 1 through 5 are strictly prioritized. That is, a higher-numbered interrupt can always interrupt a lower-numbered interrupt. In the status register, a privileged instruction allows setting the current minimum interrupt level, blocking lower or equal priority interrupts. For example, if the interrupt level in the status register is set to 3, higher levels from 4 to 7 can cause an exception. Level 7 is a level triggerednon-maskable interrupt (NMI). Level 1 can be interrupted by any higher level. Level 0 means no interrupt. The level is stored in the status register, and is visible to user-level programs.
Hardware interrupts are signalled to the CPU using three inputs that encode the highest pending interrupt priority. A separate encoder is usually required to encode the interrupts, though for systems that do not require more than three hardware interrupts it is possible to connect the interrupt signals directly to the encoded inputs at the cost of more software complexity. The interrupt controller can be as simple as a74LS148 priority encoder, or may be part of avery large-scale integration (VLSI) peripheral chip such as the MC68901 Multi-Function Peripheral (used in theAtari ST range of computers andX68000), which also provides aUART, timer, and parallel I/O.
The "exception table" (interrupt vector table interrupt vector addresses) is fixed at addresses 0 through 1023, permitting 256 32-bit vectors. The first vector (RESET) consists of two vectors, namely the starting stack address, and the starting code address. Vectors 3 through 15 are used to report various errors:bus error, address error,illegal instruction,zero division, CHK and CHK2 vector, privilege violation (to blockprivilege escalation), and some reserved vectors that became line 1010 emulator, line 1111 emulator, and hardwarebreakpoint. Vector 24 starts thereal interrupts:spurious interrupt (no hardware acknowledgement), and level 1 through level 7 autovectors, then the 16 TRAP vectors, then some more reserved vectors, then the user defined vectors.
Since the starting code address vector must always be valid on reset, systems commonly included some nonvolatile memory (e.g.ROM) starting at address zero to contain the vectors andbootstrap code. However, for a general purpose system it is desirable for the operating system to be able to change the vectors at runtime. This was often accomplished by either pointing the vectors in ROM to ajump table inRAM, or through use ofbank switching to allow the ROM to be replaced by RAM at runtime.
The 68000 does not meet thePopek and Goldberg virtualization requirements for full processor virtualization because it has a single unprivileged instruction, "MOVE from SR", which allows user-mode software read-only access to a small amount of privileged state. The 68EC000 and 68SEC000, which are later derivatives of the 68000, do meet the requirements as the "MOVE from SR" instruction is privileged. The same change was introduced on the 68010 and later CPUs.
The 68000 is also unable to easily supportvirtual memory, which requires the ability to trap and recover from a failed memory access. The 68000 does provide a bus error exception which can be used to trap, but it does not save enough processor state to resume the faulted instruction once the operating system has handled the exception. Several companies did succeed in making 68000-based Unix workstations with virtual memory that worked by using two 68000 chips running in parallel on different phased clocks. When the "leading" 68000 encountered a bad memory access, extra hardware would interrupt the "main" 68000 to prevent it from also encountering the bad memory access. This interrupt routine would handle the virtual memory functions and restart the "leading" 68000 in the correct state to continue properly synchronized operation when the "main" 68000 returned from the interrupt.
These problems were fixed in the next major revision of the 68k architecture with the release of the MC68010. The Bus Error and Address Error exceptions push a large amount of internal state onto the supervisor stack in order to facilitate recovery, and the "MOVE from SR" instruction was made privileged. A new unprivileged "MOVE from CCR" instruction is provided for use in its place by user mode software; an operating system can trap and emulate user mode "MOVE from SR" instructions if desired.
The standardaddressing modes are:
Plus: access to thestatus register, and, in later models, other special registers.
Most instructions have variants that operate on 8-bit bytes, 16-bit words, and 32-bit longs; assembler languages use dot-letter suffixes ".b", ".w", and ".l" after the instruction mnemonic to indicate the variant.
Like many CPUs of its era the cycle timing of some instructions varied depending on the source operand(s). For example, the unsigned multiply instruction takes (38+2n) clock cycles to complete where 'n' is equal to the number of bits set in the operand.[53] To create a function that took a fixed cycle count required the addition of extra code after the multiply instruction. This would typically consume extra cycles for each bit that wasn't set in the original multiplication operand.
Most instructions aredyadic, that is, the operation has a source, and a destination, and the destination is changed. Notable instructions are:
The 68EC000 is a low-cost version of the 68000 with a slightly different pinout, designed for embedded controller applications. The 68EC000 can have either a8-bit or16-bitdata bus, switchable at reset.[54]
The processors are available in a variety of speeds including 8 and 16 MHz configurations, producing 2,100 and 4,376 Dhrystones each. These processors have nofloating-point unit, and it is difficult to implement an FPUcoprocessor (MC68881/2) with one because the EC series lacks necessary coprocessor instructions.
The 68EC000 was used as a controller in many audio applications, includingEnsoniq musical instruments and sound cards, where it was part of theMIDI synthesizer.[55] On Ensoniq sound boards, the controller provided several advantages compared to competitors without a CPU on board. The processor allowed the board to be configured to perform various audio tasks, such asMPU-401 MIDI synthesis orMT-32 emulation, without the use of aterminate-and-stay-resident program. This improved software compatibility, lowered CPU usage, and eliminated host system memory usage.
The Motorola 68EC000 core was later used in the m68k-basedDragonBall processors from Motorola/Freescale.
It also was used as a sound controller in theSega Saturn game console and as a controller for theHPJetDirectEthernet controller boards for the mid-1990sHP LaserJet printers.
The 68000assembly code below is for a subroutine namedstrtolower, which copies a null-terminated string of 8-bit characters to a destination string, converting all alphabetic characters to lower case.
00100000 00100000 4E56 000000100004 306E 000800100008 326E 000C0010000C 10180010000E 0C40 004100100012 6500 000E00100016 0C40 005A0010001A 6200 00060010001E 0640 002000100022 12C000100024 66E600100026 4E5E00100028 4E750010002A | ; strtolower:; Copy a null-terminated ASCII string, converting; all alphabetic characters to lower case.;; Entry parameters:; (SP+0): Return address; (SP+4): Source string address; (SP+8): Target string addressorg$00100000;Start at 00100000strtolowerpubliclinka6,#0;Set up stack framemovea8(a6),a0;A0 = src, from stackmovea12(a6),a1;A1 = dst, from stackloopmove.b(a0)+,d0;Load D0 from (src), incr srccmpi#'A',d0;If D0 < 'A',blocopy;skipcmpi#'Z',d0;If D0 > 'Z',bhicopy;skipaddi#'a'-'A',d0;D0 = lowercase(D0)copymove.bd0,(a1)+;Store D0 to (dst), incr dstbneloop;Repeat while D0 <> NULunlka6;Restore stack framerts;Returnend |
The subroutine establishes acall frame using register A6 as the frame pointer. This kind ofcalling convention supportsreentrant andrecursive code and is typically used by languages likeC andC++. The subroutine then retrieves the parameters passed to it (src anddst) from the stack. It then loops, reading an ASCII character (one byte) from thesrc string, checking whether it is a capital alphabetic character, and if so, converting it into a lower-case character, otherwise leaving it as it is, then writing the character into thedst string. Finally, it checks whether the character was anull character; if not, it repeats the loop, otherwise it restores the previous stack frame (and A6 register) and returns. Note that the string pointers (registers A0 and A1) are auto-incremented in each iteration of the loop.
In contrast, the code below is for a stand-alone function, even on the most restrictive version of AMS for theTI-89 series of calculators, being kernel-independent, with no values looked up in tables, files or libraries when executing, no system calls, no exception processing, minimal registers to be used, nor the need to save any. It is valid for historicalJulian dates from 1 March 1 AD, or forGregorian ones. In less than two dozen operations it calculates a day number compatible withISO 8601 when called with three inputs stored at their corresponding LOCATIONS:
;; WDN, an address - for storing result d0; FLAG, 0 or 2 - to choose between Julian or Gregorian, respectively; DATE, year0mda - date stamp as binary word&byte&byte in basic ISO-format;(YEAR, year ~ YEAR=DATE due to big-endianness);move.lDATE,d0move.ld0,d1;; Apply step 1 -Lachman's congruenceandi.l#$f00,d0divu#100,d0addi.w#193,d0andi.l#$ff,d0divu#100,d0; d0 has the month index i in the upper word (mod 100);; Apply step 2 - Finding spqr as the year of the Julian leap day preceding DATEswapd0andi.l#$ffff,d0add.bd1,d0add.wYEAR,d0subi.l#$300,d1lsr#2,d1swapd1add.wd1,d0; spqr/4 + year + i + da;; (Apply step 0 - Gregorian adjustment)muluFLAG,d1divu#50,d1mulu#25,d1lsr#2,d1add.wd1,d0add.wFLAG,d0; (sp32div16) + spqr/4 + year + i + da;divu#7,d0swapd0; d0.w becomes the day number;move.wd0,WDN; returns the day number to address WDNrts;; Days of the week correspond to day numbers of the week as:; Sun=0 Mon=1 Tue=2 Wed=3 Thu=4 Fri=5 Sat=6;
