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Semiconductor device fabrication
MOSFET scaling (process nodes)
020 μm – 1968 010 μm – 1971 006 μm – 1974 003 μm – 1977  1.5 μm – 1981 001 μm – 1984 800 nm – 1987 600 nm – 1990 350 nm – 1993 250 nm – 1996 180 nm – 1999 130 nm – 2001 090 nm – 2003 065 nm – 2005 045 nm – 2007 032 nm – 2009 028 nm – 2010 022 nm – 2012 014 nm – 2014 010 nm – 2016 007 nm – 2018 005 nm – 2020 003 nm – 2022
Future 002 nm ~ 2025 001 nm ~ 2027
Half-nodes Density CMOS Device (multi-gate) Moore's law Transistor count Semiconductor Industry Nanoelectronics
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Per theInternational Technology Roadmap for Semiconductors, the45 nm process is aMOSFET technologynode referring to the average half-pitch of a memory cell manufactured at around the 2007–2008 time frame.

Matsushita andIntel started mass-producing 45 nm chips in late 2007, andAMD started production of 45 nm chips in late 2008, whileIBM,Infineon,Samsung, andChartered Semiconductor have already completed a common 45 nm process platform. At the end of 2008,SMIC was the first China-based semiconductor company to move to 45 nm, having licensed the bulk 45 nm process from IBM. In 2008,TSMC moved on to a 40 nm process.

Many critical feature sizes are smaller than the wavelength of light used forlithography (i.e., 193 nm and 248 nm). A variety of techniques, such as larger lenses, are used to make sub-wavelength features.Double patterning has also been introduced to assist in shrinking distances between features, especially if dry lithography is used. It is expected that more layers will be patterned with 193 nm wavelength at the 45 nm node. Moving previously loose layers (such as Metal 4 and Metal 5) from 248 nm to 193 nm wavelength is expected to continue, which will likely further drive costs upward, due to difficulties with 193 nmphotoresists.

Chipmakers have initially voiced concerns about introducing newhigh-κ materials into the gate stack, for the purpose of reducingleakage current density. As of 2007, however, both IBM and Intel have announced that they have high-κ dielectric and metal gate solutions, which Intel considers to be a fundamental change intransistor design.^[1]NEC has also put high-κ materials into production.

• In 2004,TSMC demonstrated a 0.296-square-micrometre 45 nmSRAM cell. In 2008, TSMC moved on to a 40 nm process.^[2]
• In January 2006, Intel demonstrated a 0.346-square-micrometre 45 nm nodeSRAM cell.
• In April 2006, AMD demonstrated a 0.370-square-micrometre 45 nm SRAM cell.
• In June 2006,Texas Instruments debuted a 0.24-square-micrometre 45 nm SRAM cell, with the help ofimmersion lithography.
• In November 2006,UMC announced that it had developed a 45 nm SRAM chip with a cell size of less than 0.25-square-micrometre using immersion lithography andlow-κ dielectrics.
• In 2006, Samsung developed a 40 nm process.^[3]

The successors to 45 nm technology are32 nm,22 nm, and then14 nm technologies.

Matsushita Electric Industrial Co. started mass production ofsystem-on-a-chip (SoC) ICs for digital consumer equipment based on 45 nm process technology in June 2007.

Intel shipped its first 45 nm processor, theXeon 5400 series, in November 2007.

Many details about Penryn appeared at the April 2007Intel Developer Forum. Its successor is calledNehalem. Important advances^[4] include the addition of new instructions (includingSSE4, also known as Penryn New Instructions) and new fabrication materials (most significantly ahafnium-based dielectric). Intel's 45nm process has a transistor density of 3.33 million transistors per square millimeter (MTr/mm2).^[5]

AMD released itsSempron II,Athlon II,Turion II andPhenom II (in generally increasing order of performance), as well as ShanghaiOpteron processors using 45 nm process technology in late 2008.

TheXbox 360 S, released in 2010, has aXenon processor fabricated in a 45 nm process.^[6]

ThePlayStation 3 Slim model introduced theCell Broadband Engine in a 45 nm process.^[7]

At IEDM 2007, more technical details of Intel's 45 nm process were revealed.^[8]

Since immersion lithography is not used here, the lithographic patterning is more difficult. Hence, a line-cuttingdouble patterning method is used explicitly for this 45 nm process. Also, the use ofhigh-κ dielectric dielectrics is introduced for the first time, to address gate leakage issues. For the32 nm node,immersion lithography will begin to be used by Intel.

• 160 nm gate pitch (73% of 65 nm generation)
• 200 nm isolation pitch (91% of 65 nm generation) indicating a slowing of scaling ofisolation distance between transistors
• Extensive use of dummy copper metal and dummy gates^[9]
• 35 nm gate length (same as 65 nm generation)
• 1 nm equivalent oxide thickness, with 0.7 nm transition layer
• Gate-last process using dummy polysilicon and damascene metal gate
• Squaring of gate ends using a second photoresist coating^[10]
• 9 layers of carbon-doped oxide andCu interconnect, the last being a thick "redistribution" layer
• Contacts shaped more like rectangles than circles forlocal interconnects
• Lead-free packaging
• 1.36 mA/μm nFET drive current
• 1.07 mA/μm pFET drive current, 51% faster than 65 nm generation, with higher hole mobility due to increase from 23% to 30% Ge in embedded SiGe stressors

In a 2008 Chipworks reverse-engineering,^[11] it was disclosed that the trench contacts were formed as a "Metal-0" layer in tungsten serving as a local interconnect. Most trench contacts were short lines oriented parallel to the gates covering diffusion, while gate contacts where even shorter lines oriented perpendicular to the gates.

It was recently revealed^[12] that both theNehalem andAtom microprocessors usedSRAM cells containing eight transistors instead of the conventional six, in order to better accommodate voltage scaling. This resulted in an area penalty of over 30%.

• Matsushita released the 45 nmUniphier in 2007.^[13]
• Wolfdale,Wolfdale-3M,Yorkfield,Yorkfield XE andPenryn Intel processors sold under theCore 2 brand.
• First generationIntel Core i3, i5 and i7 series processors such asClarksfield,Bloomfield andLynnfield.
• Diamondville,Pineview are Intel cores withHyper-Threading sold under theIntel Atom brand.
• AMD Thuban (Phenom II), Callisto, Heka, Propus, Deneb, Zosma (Phenom II) and Shanghai (Opteron) Quad-Core Processors, Regor (Athlon II) dual core processors[1], Caspian (Turion II) mobile dual core processors.
• TheXenon processor in theXbox 360 S model.
• Sony/ToshibaCell Broadband Engine inPlayStation 3 Slim model – September 2009.
• Samsung S5PC110, as known asHummingbird.
• Texas InstrumentsOMAP 3 and 4 series.
• IBMPOWER7 andz196
• FujitsuSPARC64 VIIIfx series
• TheWii U "Espresso" IBM CPU.

• Panasonic Begins Mass Production of 45-nm Generation SoC
• Intel 45 nm process is good to go
• Intel moving to 45nm sooner than expected?
• Chipmakers gear up for manufacturing hurdles
• Intel 45 nm node SRAM cell
• An AMD Update
• Slashdot discussion ofn nm process naming
• 45 nm Technology from Intel
• Intel 45 nm process at IEDM

• International Technology Roadmap for Semiconductors lithography nodes
• Taiwanese inventions

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