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128-bit computing

From Wikipedia, the free encyclopedia
Computer architecture bit width

Computer architecture bit widths
Bit
Application
Binary floating-pointprecision
Decimal floating-pointprecision

Incomputer architecture,128-bitintegers,memory addresses, or otherdata units are those that are 128bits (16octets) wide. Also, 128-bitcentral processing unit (CPU) andarithmetic logic unit (ALU) architectures are those that are based onregisters,address buses, ordata buses of that size.

As of July 2025[update] there are no mainstreamgeneral-purpose processors built to operate on 128-bitintegers or addresses, although a number of processors do have specialized ways to operate on 128-bit chunks of data as summarized in§ Hardware.

Representation

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A processor with 128-bit byte addressing could directly address up to 2128 (over3.40×1038) bytes, which would greatly exceed the total data captured, created, or replicated on Earth as of 2018, which has been estimated to be around 33 zettabytes (over 274 bytes).[1]

A 128-bit register can store 2128 (over 3.40 × 1038) different values. The range ofinteger values that can be stored in 128 bits depends on theinteger representation used. With the two most common representations, the range is 0 through 340,​282,​366,​920,​938,​463,​463,​374,​607,​431,​768,​211,​455(2128 − 1) for representation as an (unsigned)binary number, and −170,​141,​183,​460,​469,​231,​731,​687,​303,​715,​884,​105,​728 (−2127) through 170,​141,​183,​460,​469,​231,​731,​687,​303,​715,​884,​105,​727(2127 − 1) for representation astwo's complement.

Quadruple precision (128 bits) floating-point numbers can store 113-bitfixed-point numbers orintegers accurately without losingprecision (thus 64-bit integers in particular). Quadruple precision floats can also represent any position in theobservable universe with at least micrometer precision.[citation needed]

Decimal128 floating-point numbers can represent numbers with up to 34 significant digits.

Hardware

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A 128-bitmulticomparator was described by researchers in 1976.[2]

TheIBM System/360 Model 85,[3] andIBM System/370 and its successors, support 128-bit floating-point arithmetic.

TheSiemens 7.700 and 7.500 series mainframes and their successors support 128-bit floating-point arithmetic.[4]

Most modern CPUs featuresingle instruction, multiple data (SIMD) instruction sets (Streaming SIMD Extensions,AltiVec etc.) where 128-bitvector registers are used to store several smaller numbers, such as four 32-bit floating-point numbers. A single instruction can then operate on all these values in parallel. However, these processors do not operate on individual numbers that are 128 binary digits in length; only their vector registers have the size of 128 bits.

The DECVAX supported operations on 128-bit integer ('O' or octaword) and 128-bit floating-point ('H-float' or HFLOAT) datatypes. Support for such operations was an upgrade option rather than being a standard feature. Since the VAX's registers were 32 bits wide, a 128-bit operation used four consecutive registers or four longwords in memory.

TheICL 2900 Series provided a 128-bit accumulator, and its instruction set included 128-bit floating-point andpacked decimal arithmetic.

A CPU with 128-bit multimedia extensions was designed by researchers in 1999.[5]

Among thesixth generation of video game consoles, theDreamcast and thePlayStation 2 used the term128-bit in their marketing to describe their capability. The PlayStation 2's CPU had 128-bit SIMD capabilities.[6][7] Neither console supported 128-bit addressing or 128-bit integer arithmetic.

TheRISC-V ISA specification from 2016 includes a reservation for a 128-bit version of the architecture, but the details remain undefined intentionally, because there is yet so little practical experience with such large word size.[8]

Software

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In the same way thatcompilers emulate, e.g., 64-bit integer arithmetic on architectures with register sizes less than 64 bits, some compilers also support 128-bit integer arithmetic. For example, theGCC C compiler 4.6 and later has a 128-bit integer type__int128 for some architectures.[9] GCC and compatible compilers signal the presence of 128-bit arithmetic when the macro__SIZEOF_INT128__ is defined.[10] For theC programming language, 128-bit support is optional, e.g. via theint128_t type, or it can be implemented by a compiler-specific extension. TheRust programming language has built-in support for 128-bit integers (originally viaLLVM), which is implemented on all platforms.[11] A 128-bit type provided by a C compiler can be available inPerl via theMath::Int128 module.[12]

Other uses

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  • Universally unique identifiers (UUID) consist of a 128-bit value.
  • IPv6 routes computer network traffic amongst a 128-bit range of addresses.
  • ZFS is a 128-bit file system.
  • 128 bits is a commonkey size forsymmetric ciphers and a common block size forblock ciphers incryptography.
  • TheIBM i Machine Interface defines all pointers as 128-bit. The Machine Interface instructions are translated to the hardware's real instruction set as required, allowing the underlying hardware to change without needing to recompile the software. Past hardware had aCISC instruction set with 48-bit addressing, while current hardware is 64-bitPowerPC/Power ISA. In the PowerPC/Power ISA implementation, the first four bytes contain information used to identify the type of the object being referenced, and the final eight bytes are used as a virtual memory address.[13] The remaining four bytes are unused, and would allow IBM i applications to be extended to 96-bit addressing in future without requiring code changes.
  • Increasing the word size can speed upmultiple precision mathematical libraries, with applications tocryptography, and potentially speed up algorithms used in complex mathematical processing (numerical analysis,signal processing, complexphoto editing andaudio andvideo processing).
  • MD5 is a hash function producing a 128-bit hash value.
  • Apache Avro uses a 128-bit random number as synchronization marker for efficient splitting of data files.[14][15]

References

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  1. ^Reinsel, David; Gantz, John; Rydning, John (November 2018)."The Digitalization of the World from Edge to Core"(PDF).Seagate Technology.IDC. p. 3.Archived(PDF) from the original on 7 September 2021. Retrieved14 September 2021.
  2. ^Mead, Carver A.; Pashley, Richard D.; Britton, Lee D.; Daimon, Yoshiaki T.; Sando, Stewart F. Jr. (October 1976)."128-Bit Multicomparator"(PDF).IEEE Journal of Solid-State Circuits.11 (5):692–695.Bibcode:1976IJSSC..11..692M.doi:10.1109/JSSC.1976.1050799.S2CID 27262034.Archived(PDF) from the original on 3 November 2018.
  3. ^Padegs A (1968). "Structural aspects of the System/360 Model 85, III: Extensions to floating-point architecture".IBM Systems Journal.7:22–29.doi:10.1147/sj.71.0022.
  4. ^Assembler Instructions (BS2000/OSD). 1993.
  5. ^Suzuoki, M.; Kutaragi, K.; Hiroi, T.; Magoshi, H.; Okamoto, S.; Oka, M.; Ohba, A.; Yamamoto, Y.; Furuhashi, M.; Tanaka, M.; Yutaka, T.; Okada, T.; Nagamatsu, M.; Urakawa, Y.; Funyu, M.; Kunimatsu, A.; Goto, H.; Hashimoto, K.; Ide, N.; Murakami, H.; Ohtaguro, Y.; Aono, A. (November 1999). "A microprocessor with a 128-bit CPU, ten floating-point MAC's, four floating-point dividers, and an MPEG-2 decoder".IEEE Journal of Solid-State Circuits.34 (11):1608–1618.Bibcode:1999IJSSC..34.1608S.doi:10.1109/4.799870.
  6. ^Hennessy, John L.;Patterson, David A. (2003).Computer Architecture: A Quantitative Approach (Third ed.). Morgan Kaufmann Publishers.ISBN 1-55860-724-2.
  7. ^Diefendorff, Keith (19 April 1999). "Sony's Emotionally Charged Chip".Microprocessor Report.13 (5). Microdesign Resources.
  8. ^Waterman, Andrew;Asanović, Krste."The RISC-V Instruction Set Manual, Volume I: Base User-Level ISA version 2.2". University of California, Berkeley. EECS-2016-118. Retrieved25 May 2017.
  9. ^"GCC 4.6 Release Series – Changes, New Features, and Fixes". Retrieved25 July 2016.
  10. ^Marc Glisse (26 August 2015)."128-bit integer – nonsensical documentation?". GCC-Help. Retrieved23 January 2020.
  11. ^"i128 – Rust".doc.rust-lang.org. Retrieved25 June 2020.
  12. ^"Math::Int128".metacpan.org. Retrieved25 June 2020.
  13. ^Frank G. Soltis (1997).Inside the AS/400, Second Edition. Duke Press.ISBN 978-1-882419-66-1.
  14. ^Kleppmann, Martin (24 January 2013)."Re: Synchronization Markers".Archived from the original on 27 September 2015.
  15. ^"Apache Avro 1.8.0 Specification".Apache Software Foundation.
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