| Release date | November 2006 |
|---|---|
| Fabrication process | 90 nm, 80 nm, 65 nm, 55 nm, and 40 nm |
| History | |
| Predecessor | Curie |
| Successor | Fermi |
| Support status | |
| Unsupported | |
Tesla is the codename for a GPUmicroarchitecture developed byNvidia, and released in 2006, as the successor toCurie microarchitecture. It was named after the pioneering electrical engineerNikola Tesla.[1] As Nvidia's first microarchitecture to implement unified shaders, it was used withGeForce 8 series,GeForce 9 series,GeForce 100 series,GeForce 200 series, andGeForce 300 series of GPUs, collectively manufactured in90 nm,80 nm,65 nm,55 nm, and40 nm. It was also in theGeForce 405 and in theQuadro FX, Quadro x000, Quadro NVS series, andNvidia Tesla computing modules.
Tesla replaced the oldfixed-pipeline microarchitectures, represented at the time of introduction by theGeForce 7 series. It competed directly withAMD's first unified shader microarchitecture namedTeraScale, a development ofATi's work on theXbox 360 which used a similar design. Tesla was followed byFermi.
Tesla is Nvidia's first microarchitecture implementing theunified shader model. The driver supportsDirect3D 10Shader Model 4.0 /OpenGL 2.1 (later drivers have OpenGL 3.3 support) architecture. The design is a major shift for NVIDIA in GPU functionality and capability, the most obvious change being the move from the separate functional units (pixel shaders, vertex shaders) within previous GPUs to a homogeneous collection of universalfloating point processors (called "stream processors") that can perform a more universal set of tasks.
GeForce 8's unified shader architecture consists of a number ofstream processors (SPs). Unlike thevector processing approach taken with older shader units, each SP isscalar and thus can operate only on one component at a time. This makes them less complex to build while still being quite flexible and universal. Scalar shader units also have the advantage of being more efficient in a number of cases as compared to previous generationvector shader units that rely on ideal instruction mixture and ordering to reach peak throughput. The lower maximum throughput of these scalar processors is compensated for by efficiency and by running them at a high clock speed (made possible by their simplicity). GeForce 8 runs the various parts of its core at differing clock speeds (clock domains), similar to the operation of the previousGeForce 7 series GPUs. For example, the stream processors of GeForce 8800 GTX operate at a 1.35 GHz clock rate while the rest of the chip is operating at 575 MHz.[2]
GeForce 8 performs significantly bettertexture filtering than its predecessors that used various optimizations and visual tricks to speed up rendering without impairing filtering quality. The GeForce 8 line correctly renders an angle-independentanisotropic filtering algorithm along with fulltrilinear texture filtering. G80, though not its smaller brethren, is equipped with much more texture filtering arithmetic ability than the GeForce 7 series. This allows high-quality filtering with a much smaller performance hit than previously.[2]
NVIDIA has also introduced new polygon edgeanti-aliasing methods, including the ability of the GPU'sROPs to perform bothMultisample anti-aliasing (MSAA) and HDR lighting at the same time, correcting various limitations of previous generations. GeForce 8 can perform MSAA with both FP16 and FP32 texture formats. GeForce 8 supports 128-bitHDR rendering, an increase from prior cards' 64-bit support. The chip's new anti-aliasing technology, called coverage sampling AA (CSAA), uses Z, color, and coverage information to determine final pixel color. This technique of color optimization allows 16X CSAA to look crisp and sharp.[3]
The claimed theoreticalsingle-precision processing power for Tesla-based cards given inFLOPS may be hard to reach in real-world workloads.[4]
In G80/G90/GT200, each Streaming Multiprocessor (SM) contains 8 Shader Processors (SP, or Unified Shader, orCUDA Core) and 2 Special Function Units (SFU). Each SP can fulfill up to two single-precision operations per clock: 1 Multiply and 1 Add, using a singleMAD instruction. Each SFU can fulfill up to four operations per clock: four MUL (Multiply) instructions. So one SM as a whole can execute 8 MADs (16 operations) and 8 MULs (8 operations) per clock, or 24 operations per clock, which is (relatively speaking) 3 times the number of SPs. Therefore, to calculate the theoretical dual-issue MAD+MUL performance in floating point operations per second [FLOPSsp+sfu,GFLOPS] of a graphics card with SP count [n] and shader frequency [f, GHz], the formula is:FLOPSsp+sfu = 3 × n × f.[5][6]
However leveraging dual-issue performance like MAD+MUL is problematic:
For these reasons, in order to estimate the performance of real-world workloads, it may be more helpful to ignore the SFU and to assume only 1 MAD (2 operations) per SP per cycle. In this case the formula to calculate the theoretical performance in floating point operations per second becomes:FLOPSsp = 2 × n × f.
The theoreticaldouble-precision processing power of a Tesla GPU is 1/8 of the single precision performance on GT200; there is no double precision support on G8x and G9x.[10]
NVENC was only introduced in later chips.
The individual streaming processing cores of GeForce GTX 200 GPUs can now perform near full-speed dual-issue of multiply-add operations (MADs) and MULs (3 flops/SP)
